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	ACPI, Add 64bit read/write support to atomicio on i386
There is no 64bit read/write support in ACPI atomicio because readq/writeq is used to implement 64bit read/write, but readq/writeq is not available on i386. This patch implement 64bit read/write support in atomicio via two readl/writel. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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					 1 changed files with 30 additions and 6 deletions
				
			
		|  | @ -260,6 +260,21 @@ int acpi_post_unmap_gar(struct acpi_generic_address *reg) | ||||||
| } | } | ||||||
| EXPORT_SYMBOL_GPL(acpi_post_unmap_gar); | EXPORT_SYMBOL_GPL(acpi_post_unmap_gar); | ||||||
| 
 | 
 | ||||||
|  | #ifdef readq | ||||||
|  | static inline u64 read64(const volatile void __iomem *addr) | ||||||
|  | { | ||||||
|  | 	return readq(addr); | ||||||
|  | } | ||||||
|  | #else | ||||||
|  | static inline u64 read64(const volatile void __iomem *addr) | ||||||
|  | { | ||||||
|  | 	u64 l, h; | ||||||
|  | 	l = readl(addr); | ||||||
|  | 	h = readl(addr+4); | ||||||
|  | 	return l | (h << 32); | ||||||
|  | } | ||||||
|  | #endif | ||||||
|  | 
 | ||||||
| /*
 | /*
 | ||||||
|  * Can be used in atomic (including NMI) or process context. RCU read |  * Can be used in atomic (including NMI) or process context. RCU read | ||||||
|  * lock can only be released after the IO memory area accessing. |  * lock can only be released after the IO memory area accessing. | ||||||
|  | @ -280,11 +295,9 @@ static int acpi_atomic_read_mem(u64 paddr, u64 *val, u32 width) | ||||||
| 	case 32: | 	case 32: | ||||||
| 		*val = readl(addr); | 		*val = readl(addr); | ||||||
| 		break; | 		break; | ||||||
| #ifdef readq |  | ||||||
| 	case 64: | 	case 64: | ||||||
| 		*val = readq(addr); | 		*val = read64(addr); | ||||||
| 		break; | 		break; | ||||||
| #endif |  | ||||||
| 	default: | 	default: | ||||||
| 		return -EINVAL; | 		return -EINVAL; | ||||||
| 	} | 	} | ||||||
|  | @ -293,6 +306,19 @@ static int acpi_atomic_read_mem(u64 paddr, u64 *val, u32 width) | ||||||
| 	return 0; | 	return 0; | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
|  | #ifdef writeq | ||||||
|  | static inline void write64(u64 val, volatile void __iomem *addr) | ||||||
|  | { | ||||||
|  | 	writeq(val, addr); | ||||||
|  | } | ||||||
|  | #else | ||||||
|  | static inline void write64(u64 val, volatile void __iomem *addr) | ||||||
|  | { | ||||||
|  | 	writel(val, addr); | ||||||
|  | 	writel(val>>32, addr+4); | ||||||
|  | } | ||||||
|  | #endif | ||||||
|  | 
 | ||||||
| static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width) | static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width) | ||||||
| { | { | ||||||
| 	void __iomem *addr; | 	void __iomem *addr; | ||||||
|  | @ -309,11 +335,9 @@ static int acpi_atomic_write_mem(u64 paddr, u64 val, u32 width) | ||||||
| 	case 32: | 	case 32: | ||||||
| 		writel(val, addr); | 		writel(val, addr); | ||||||
| 		break; | 		break; | ||||||
| #ifdef writeq |  | ||||||
| 	case 64: | 	case 64: | ||||||
| 		writeq(val, addr); | 		write64(val, addr); | ||||||
| 		break; | 		break; | ||||||
| #endif |  | ||||||
| 	default: | 	default: | ||||||
| 		return -EINVAL; | 		return -EINVAL; | ||||||
| 	} | 	} | ||||||
|  |  | ||||||
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