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gpio/mxc: add chained_irq_enter/exit() to mx3_gpio_irq_handler()

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The mx3_gpio_irq_handler() is also called on imx6q which has GIC as
the primary interrupt controller.  As GIC implements the fasteoi flow
control, we need to add chained_irq_enter/exit() to
mx3_gpio_irq_handler() for signaling EOI, otherwise system will hang
whenever there is a gpio irq triggered.

v2: use chained_irq_{enter,exit}()

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
This commit is contained in:
Shawn Guo 2011-09-21 21:24:04 +08:00 committed by Grant Likely
parent 479a0c7eee
commit 0e44b6eccf
1 changed files with 6 additions and 0 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

6
drivers/gpio/gpio-mxc.c
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@ -30,6 +30,7 @@
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_device.h> #include <linux/of_device.h>
#include <asm-generic/bug.h> #include <asm-generic/bug.h>
#include <asm/mach/irq.h>
enum mxc_gpio_hwtype { enum mxc_gpio_hwtype {
IMX1_GPIO, /* runs on i.mx1 */ IMX1_GPIO, /* runs on i.mx1 */
@ -232,10 +233,15 @@ static void mx3_gpio_irq_handler(u32 irq, struct irq_desc *desc)
{ {
u32 irq_stat; u32 irq_stat;
struct mxc_gpio_port *port = irq_get_handler_data(irq); struct mxc_gpio_port *port = irq_get_handler_data(irq);
struct irq_chip *chip = irq_get_chip(irq);
chained_irq_enter(chip, desc);
irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR); irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
mxc_gpio_irq_handler(port, irq_stat); mxc_gpio_irq_handler(port, irq_stat);
chained_irq_exit(chip, desc);
} }
/* MX2 has one interrupt *for all* gpio ports */ /* MX2 has one interrupt *for all* gpio ports */