forked from mirrors/linux
		
	spi: amd: Add support for version AMDI0062
Add support for the AMD SPI controller version AMDI0062. Do this in a modular way where's easy to add new versions. Signed-off-by: André Almeida <andrealmeid@collabora.com> Link: https://lore.kernel.org/r/20220211143155.75513-4-andrealmeid@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
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						2090435549
					
				
					 1 changed files with 71 additions and 10 deletions
				
			
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					@ -19,6 +19,10 @@
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#define AMD_SPI_FIFO_CLEAR	BIT(20)
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					#define AMD_SPI_FIFO_CLEAR	BIT(20)
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#define AMD_SPI_BUSY		BIT(31)
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					#define AMD_SPI_BUSY		BIT(31)
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					#define AMD_SPI_OPCODE_REG	0x45
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					#define AMD_SPI_CMD_TRIGGER_REG	0x47
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					#define AMD_SPI_TRIGGER_CMD	BIT(7)
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#define AMD_SPI_OPCODE_MASK	0xFF
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					#define AMD_SPI_OPCODE_MASK	0xFF
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#define AMD_SPI_ALT_CS_REG	0x1D
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					#define AMD_SPI_ALT_CS_REG	0x1D
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					@ -35,9 +39,15 @@
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#define AMD_SPI_XFER_TX		1
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					#define AMD_SPI_XFER_TX		1
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#define AMD_SPI_XFER_RX		2
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					#define AMD_SPI_XFER_RX		2
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					enum amd_spi_versions {
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						AMD_SPI_V1 = 1,	/* AMDI0061 */
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						AMD_SPI_V2,	/* AMDI0062 */
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					};
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struct amd_spi {
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					struct amd_spi {
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	void __iomem *io_remap_addr;
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						void __iomem *io_remap_addr;
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	unsigned long io_base_addr;
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						unsigned long io_base_addr;
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						enum amd_spi_versions version;
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};
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					};
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static inline u8 amd_spi_readreg8(struct amd_spi *amd_spi, int idx)
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					static inline u8 amd_spi_readreg8(struct amd_spi *amd_spi, int idx)
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					@ -81,14 +91,29 @@ static void amd_spi_select_chip(struct amd_spi *amd_spi, u8 cs)
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	amd_spi_setclear_reg8(amd_spi, AMD_SPI_ALT_CS_REG, cs, AMD_SPI_ALT_CS_MASK);
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						amd_spi_setclear_reg8(amd_spi, AMD_SPI_ALT_CS_REG, cs, AMD_SPI_ALT_CS_MASK);
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}
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					}
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					static inline void amd_spi_clear_chip(struct amd_spi *amd_spi, u8 chip_select)
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					{
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						amd_spi_writereg8(amd_spi, AMD_SPI_ALT_CS_REG, chip_select & ~AMD_SPI_ALT_CS_MASK);
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					}
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static void amd_spi_clear_fifo_ptr(struct amd_spi *amd_spi)
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					static void amd_spi_clear_fifo_ptr(struct amd_spi *amd_spi)
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{
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					{
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	amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, AMD_SPI_FIFO_CLEAR, AMD_SPI_FIFO_CLEAR);
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						amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, AMD_SPI_FIFO_CLEAR, AMD_SPI_FIFO_CLEAR);
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}
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					}
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static void amd_spi_set_opcode(struct amd_spi *amd_spi, u8 cmd_opcode)
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					static int amd_spi_set_opcode(struct amd_spi *amd_spi, u8 cmd_opcode)
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{
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					{
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	amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, cmd_opcode, AMD_SPI_OPCODE_MASK);
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						switch (amd_spi->version) {
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						case AMD_SPI_V1:
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							amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, cmd_opcode,
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									       AMD_SPI_OPCODE_MASK);
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							return 0;
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						case AMD_SPI_V2:
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							amd_spi_writereg8(amd_spi, AMD_SPI_OPCODE_REG, cmd_opcode);
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							return 0;
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						default:
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							return -ENODEV;
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						}
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}
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					}
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static inline void amd_spi_set_rx_count(struct amd_spi *amd_spi, u8 rx_count)
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					static inline void amd_spi_set_rx_count(struct amd_spi *amd_spi, u8 rx_count)
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					@ -104,9 +129,21 @@ static inline void amd_spi_set_tx_count(struct amd_spi *amd_spi, u8 tx_count)
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static int amd_spi_busy_wait(struct amd_spi *amd_spi)
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					static int amd_spi_busy_wait(struct amd_spi *amd_spi)
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{
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					{
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	u32 val;
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						u32 val;
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						int reg;
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	return readl_poll_timeout(amd_spi->io_remap_addr + AMD_SPI_CTRL0_REG,
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						switch (amd_spi->version) {
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				  val, !(val & AMD_SPI_BUSY), 20, 2000000);
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						case AMD_SPI_V1:
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							reg = AMD_SPI_CTRL0_REG;
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							break;
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						case AMD_SPI_V2:
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							reg = AMD_SPI_STATUS_REG;
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							break;
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						default:
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							return -ENODEV;
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						}
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						return readl_poll_timeout(amd_spi->io_remap_addr + reg, val,
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									  !(val & AMD_SPI_BUSY), 20, 2000000);
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}
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					}
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static int amd_spi_execute_opcode(struct amd_spi *amd_spi)
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					static int amd_spi_execute_opcode(struct amd_spi *amd_spi)
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					@ -117,10 +154,20 @@ static int amd_spi_execute_opcode(struct amd_spi *amd_spi)
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	if (ret)
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						if (ret)
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		return ret;
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							return ret;
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						switch (amd_spi->version) {
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						case AMD_SPI_V1:
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		/* Set ExecuteOpCode bit in the CTRL0 register */
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							/* Set ExecuteOpCode bit in the CTRL0 register */
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	amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, AMD_SPI_EXEC_CMD, AMD_SPI_EXEC_CMD);
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							amd_spi_setclear_reg32(amd_spi, AMD_SPI_CTRL0_REG, AMD_SPI_EXEC_CMD,
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									       AMD_SPI_EXEC_CMD);
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		return 0;
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							return 0;
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						case AMD_SPI_V2:
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							/* Trigger the command execution */
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							amd_spi_setclear_reg8(amd_spi, AMD_SPI_CMD_TRIGGER_REG,
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									      AMD_SPI_TRIGGER_CMD, AMD_SPI_TRIGGER_CMD);
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							return 0;
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						default:
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							return -ENODEV;
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						}
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}
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					}
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static int amd_spi_master_setup(struct spi_device *spi)
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					static int amd_spi_master_setup(struct spi_device *spi)
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					@ -190,6 +237,17 @@ static inline int amd_spi_fifo_xfer(struct amd_spi *amd_spi,
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	message->actual_length = tx_len + rx_len + 1;
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						message->actual_length = tx_len + rx_len + 1;
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	/* complete the transaction */
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						/* complete the transaction */
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	message->status = 0;
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						message->status = 0;
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						switch (amd_spi->version) {
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						case AMD_SPI_V1:
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							break;
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						case AMD_SPI_V2:
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							amd_spi_clear_chip(amd_spi, message->spi->chip_select);
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							break;
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						default:
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							return -ENODEV;
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						}
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	spi_finalize_current_message(master);
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						spi_finalize_current_message(master);
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	return 0;
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						return 0;
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					@ -235,6 +293,8 @@ static int amd_spi_probe(struct platform_device *pdev)
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	}
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						}
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	dev_dbg(dev, "io_remap_address: %p\n", amd_spi->io_remap_addr);
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						dev_dbg(dev, "io_remap_address: %p\n", amd_spi->io_remap_addr);
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						amd_spi->version = (enum amd_spi_versions) device_get_match_data(dev);
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	/* Initialize the spi_master fields */
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						/* Initialize the spi_master fields */
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	master->bus_num = 0;
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						master->bus_num = 0;
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	master->num_chipselect = 4;
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						master->num_chipselect = 4;
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					@ -260,7 +320,8 @@ static int amd_spi_probe(struct platform_device *pdev)
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#ifdef CONFIG_ACPI
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					#ifdef CONFIG_ACPI
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static const struct acpi_device_id spi_acpi_match[] = {
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					static const struct acpi_device_id spi_acpi_match[] = {
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	{ "AMDI0061", 0 },
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						{ "AMDI0061", AMD_SPI_V1 },
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						{ "AMDI0062", AMD_SPI_V2 },
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	{},
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						{},
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};
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					};
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MODULE_DEVICE_TABLE(acpi, spi_acpi_match);
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					MODULE_DEVICE_TABLE(acpi, spi_acpi_match);
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					@ -269,7 +330,7 @@ MODULE_DEVICE_TABLE(acpi, spi_acpi_match);
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static struct platform_driver amd_spi_driver = {
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					static struct platform_driver amd_spi_driver = {
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	.driver = {
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						.driver = {
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		.name = "amd_spi",
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							.name = "amd_spi",
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		.acpi_match_table = ACPI_PTR(spi_acpi_match),
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							.acpi_match_table = spi_acpi_match,
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	},
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						},
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	.probe = amd_spi_probe,
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						.probe = amd_spi_probe,
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};
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					};
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