forked from mirrors/linux
		
	ARM: dts: sunxi: add support for RerVision A33-Vstar board
RerVision A33-Vstar board is a board based on their A33-Core1 SoM (A33 SoC + 512MiB DRAM + 4GiB eMMC + AXP223 PMIC), with multiple peripherals: - MicroSD card slot - 4.0mm/1.7mm DC jack connected to ACIN of AXP223 (and a XH2.54 2-pin connector for alternative 5V DC IN) - OTG-capable microUSB port - Reserved pads for soldering Li-ion battery and/or 3V RTC battery - 3 LRADC-attached keys and 2 fixed function power/reset keys - AP6212 Wi-Fi/BT combo module - On-board GL850G hub attached to the USB host port of A33, and a RTL8152 USB Ethernet chip at the downstream of the hub - Onboard microphone (not supported yet) and headphone jack - 3 UART ports as PH2.0 3-pin connectors (UART2 one is currently used as debug output and others are ignored yet) Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Link: https://patch.msgid.link/20240913104845.4112986-2-uwu@icenowy.me Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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					 3 changed files with 302 additions and 0 deletions
				
			
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			@ -215,6 +215,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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	sun8i-a33-olinuxino.dtb \
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	sun8i-a33-q8-tablet.dtb \
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	sun8i-a33-sinlinx-sina33.dtb \
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	sun8i-a33-vstar.dtb \
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	sun8i-a83t-allwinner-h8homlet-v2.dtb \
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	sun8i-a83t-bananapi-m3.dtb \
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	sun8i-a83t-cubietruck-plus.dtb \
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| 
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										96
									
								
								arch/arm/boot/dts/allwinner/sun8i-a33-vstar-core1.dtsi
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
										96
									
								
								arch/arm/boot/dts/allwinner/sun8i-a33-vstar-core1.dtsi
									
									
									
									
									
										Normal file
									
								
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			@ -0,0 +1,96 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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 * Copyright (C) 2024 Icenowy Zheng <uwu@icenowy.me>
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 */
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#include "sun8i-a33.dtsi"
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&mmc2 {
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	pinctrl-names = "default";
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	pinctrl-0 = <&mmc2_8bit_pins>;
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	vmmc-supply = <®_dcdc1>;
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	bus-width = <8>;
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	non-removable;
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	cap-mmc-hw-reset;
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	status = "okay";
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};
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&mmc2_8bit_pins {
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	/* Increase drive strength for DDR modes */
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	drive-strength = <40>;
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};
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&r_rsb {
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	status = "okay";
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	axp22x: pmic@3a3 {
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		compatible = "x-powers,axp223";
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		reg = <0x3a3>;
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		interrupt-parent = <&r_intc>;
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		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
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		eldoin-supply = <®_dcdc1>;
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		x-powers,drive-vbus-en;
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	};
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};
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#include "axp223.dtsi"
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®_aldo1 {
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	regulator-always-on;
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	regulator-min-microvolt = <3300000>;
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	regulator-max-microvolt = <3300000>;
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	regulator-name = "vcc-io";
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};
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®_aldo2 {
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	regulator-always-on;
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	regulator-min-microvolt = <2350000>;
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	regulator-max-microvolt = <2650000>;
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	regulator-name = "vdd-dll";
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};
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®_aldo3 {
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	regulator-always-on;
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	regulator-min-microvolt = <3300000>;
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	regulator-max-microvolt = <3300000>;
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	regulator-name = "vcc-avcc";
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};
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®_dc5ldo {
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	regulator-always-on;
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	regulator-min-microvolt = <900000>;
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	regulator-max-microvolt = <1400000>;
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	regulator-name = "vdd-cpus";
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};
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®_dcdc1 {
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	regulator-always-on;
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	regulator-min-microvolt = <3300000>;
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	regulator-max-microvolt = <3300000>;
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	regulator-name = "vcc-3v3";
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};
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®_dcdc2 {
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	regulator-always-on;
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	regulator-min-microvolt = <900000>;
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	regulator-max-microvolt = <1400000>;
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	regulator-name = "vdd-sys";
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};
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®_dcdc3 {
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	regulator-always-on;
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	regulator-min-microvolt = <900000>;
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	regulator-max-microvolt = <1400000>;
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	regulator-name = "vdd-cpu";
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};
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®_dcdc5 {
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	regulator-always-on;
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	regulator-min-microvolt = <1500000>;
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	regulator-max-microvolt = <1500000>;
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	regulator-name = "vcc-dram";
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};
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®_rtc_ldo {
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	regulator-name = "vcc-rtc";
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};
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										205
									
								
								arch/arm/boot/dts/allwinner/sun8i-a33-vstar.dts
									
									
									
									
									
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										205
									
								
								arch/arm/boot/dts/allwinner/sun8i-a33-vstar.dts
									
									
									
									
									
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			@ -0,0 +1,205 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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 * Copyright (C) 2024 Icenowy Zheng <uwu@icenowy.me>
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 */
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/dts-v1/;
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#include "sun8i-a33-vstar-core1.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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	model = "Rervision A33-Vstar";
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	compatible = "rervision,a33-vstar",
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		     "rervision,a33-core1",
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		     "allwinner,sun8i-a33";
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	aliases {
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		serial0 = &uart0;
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		ethernet0 = &r8152;
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	};
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	chosen {
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		stdout-path = "serial0:115200n8";
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	};
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	reg_usb1_vbus: regulator-usb1-vbus {
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		compatible = "regulator-fixed";
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		regulator-name = "usb1-vbus";
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		regulator-min-microvolt = <5000000>;
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		regulator-max-microvolt = <5000000>;
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		regulator-boot-on;
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		enable-active-high;
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		gpio = <&pio 1 2 GPIO_ACTIVE_HIGH>; /* PB2 */
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	};
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	wifi_pwrseq: pwrseq {
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		compatible = "mmc-pwrseq-simple";
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		reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL6 */
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		clocks = <&rtc CLK_OSC32K_FANOUT>;
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		clock-names = "ext_clock";
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	};
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};
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&ac_power_supply {
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	status = "okay";
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};
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&codec {
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	status = "okay";
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};
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&dai {
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	status = "okay";
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};
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&ehci0 {
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	#address-cells = <1>;
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	#size-cells = <0>;
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	status = "okay";
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	hub@1 {
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		/* Onboard GL850G hub which needs no extra power sequence */
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		compatible = "usb5e3,608";
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		reg = <1>;
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		#address-cells = <1>;
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		#size-cells = <0>;
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		r8152: ethernet@4 {
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			/*
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			 * Onboard Realtek RTL8152 USB Ethernet,
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			 * with no MAC address programmed
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			 */
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			compatible = "usbbda,8152";
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			reg = <4>;
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		};
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	};
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};
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&lradc {
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	vref-supply = <®_aldo3>;
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	status = "okay";
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	button-191 {
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		label = "V+";
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		linux,code = <KEY_VOLUMEUP>;
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		channel = <0>;
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		voltage = <191011>;
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	};
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	button-391 {
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		label = "V-";
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		linux,code = <KEY_VOLUMEDOWN>;
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		channel = <0>;
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		voltage = <391304>;
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	};
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	button-600 {
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		label = "BACK";
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		linux,code = <KEY_BACK>;
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		channel = <0>;
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		voltage = <600000>;
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	};
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};
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&mmc0 {
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	vmmc-supply = <®_dcdc1>;
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	bus-width = <4>;
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	cd-gpios = <&pio 1 4 GPIO_ACTIVE_LOW>; /* PB4 */
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	status = "okay";
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};
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&mmc1 {
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	pinctrl-names = "default";
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	pinctrl-0 = <&mmc1_pg_pins>;
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	vmmc-supply = <®_dldo1>;
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	mmc-pwrseq = <&wifi_pwrseq>;
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	bus-width = <4>;
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	non-removable;
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	status = "okay";
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	brcmf: wifi@1 {
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		reg = <1>;
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		compatible = "brcm,bcm4329-fmac";
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		interrupt-parent = <&r_pio>;
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		interrupts = <0 7 IRQ_TYPE_LEVEL_LOW>; /* PL7 */
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		interrupt-names = "host-wake";
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	};
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};
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/*
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 * Our WiFi chip needs both DLDO1 and DLDO2 to be powered at the same
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 * time, with the two being in sync. Since this is not really
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 * supported right now, just use the two as always on, and we will fix
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 * it later.
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 */
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®_dldo1 {
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	regulator-always-on;
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	regulator-min-microvolt = <3300000>;
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	regulator-max-microvolt = <3300000>;
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	regulator-name = "vcc-wifi0";
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};
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®_dldo2 {
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	regulator-always-on;
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	regulator-min-microvolt = <3300000>;
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	regulator-max-microvolt = <3300000>;
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	regulator-name = "vcc-wifi1";
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};
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®_drivevbus {
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	regulator-name = "usb0-vbus";
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	status = "okay";
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};
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&sound {
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	/* TODO: on-board microphone */
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	simple-audio-card,widgets = "Headphone", "Headphone Jack";
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	simple-audio-card,routing =
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		"Left DAC", "DACL",
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		"Right DAC", "DACR",
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		"Headphone Jack", "HP";
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	status = "okay";
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};
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&uart0 {
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	pinctrl-names = "default";
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	pinctrl-0 = <&uart0_pb_pins>;
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	status = "okay";
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};
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&uart1 {
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	pinctrl-names = "default";
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	pinctrl-0 = <&uart1_pg_pins>, <&uart1_cts_rts_pg_pins>;
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	uart-has-rtscts;
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	status = "okay";
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	bluetooth {
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		compatible = "brcm,bcm43438-bt";
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		clocks = <&rtc CLK_OSC32K_FANOUT>;
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		clock-names = "lpo";
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		vbat-supply = <®_dldo1>;
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		device-wakeup-gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
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		host-wakeup-gpios = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
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		shutdown-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
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	};
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};
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&usb_otg {
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	dr_mode = "otg";
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	status = "okay";
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};
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&usb_power_supply {
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	status = "okay";
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};
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&usbphy {
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	usb0_id_det-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */
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	usb0_vbus_power-supply = <&usb_power_supply>;
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	usb0_vbus-supply = <®_drivevbus>;
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	usb1_vbus-supply = <®_usb1_vbus>;
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	status = "okay";
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};
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