forked from mirrors/linux
rtc: pcf2127: add support for multiple TS functions
This will simplify the implementation of new variants into this driver. Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> Link: https://lore.kernel.org/r/20230622145800.2442116-11-hugo@hugovil.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Hugo Villeneuve
Alexandre Belloni
parent
fc16599e01
commit
420cc9e850
1 changed files with 203 additions and 69 deletions
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@ -59,8 +59,8 @@
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#define PCF2127_BIT_WD_CTL_CD0 BIT(6)
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#define PCF2127_BIT_WD_CTL_CD1 BIT(7)
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#define PCF2127_REG_WD_VAL 0x11
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/* Tamper timestamp registers */
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#define PCF2127_REG_TS_CTRL 0x12
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/* Tamper timestamp1 registers */
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#define PCF2127_REG_TS1_BASE 0x12
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#define PCF2127_BIT_TS_CTRL_TSOFF BIT(6)
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#define PCF2127_BIT_TS_CTRL_TSM BIT(7)
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/*
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@ -86,12 +86,36 @@
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PCF2127_BIT_CTRL2_WDTF | \
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PCF2127_BIT_CTRL2_TSF2)
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#define PCF2127_MAX_TS_SUPPORTED 1
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enum pcf21xx_type {
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PCF2127,
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PCF2129,
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PCF21XX_LAST_ID
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};
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struct pcf21xx_ts_config {
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u8 reg_base; /* Base register to read timestamp values. */
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/*
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* If the TS input pin is driven to GND, an interrupt can be generated
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* (supported by all variants).
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*/
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u8 gnd_detect_reg; /* Interrupt control register address. */
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u8 gnd_detect_bit; /* Interrupt bit. */
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/*
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* If the TS input pin is driven to an intermediate level between GND
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* and supply, an interrupt can be generated (optional feature depending
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* on variant).
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*/
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u8 inter_detect_reg; /* Interrupt control register address. */
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u8 inter_detect_bit; /* Interrupt bit. */
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u8 ie_reg; /* Interrupt enable control register. */
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u8 ie_bit; /* Interrupt enable bit. */
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};
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struct pcf21xx_config {
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int type; /* IC variant */
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int max_register;
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@ -102,6 +126,9 @@ struct pcf21xx_config {
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u8 reg_wd_ctl; /* Watchdog control register. */
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u8 reg_wd_val; /* Watchdog value register. */
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u8 reg_clkout; /* Clkout register. */
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unsigned int ts_count;
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struct pcf21xx_ts_config ts[PCF2127_MAX_TS_SUPPORTED];
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struct attribute_group attribute_group;
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};
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struct pcf2127 {
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@ -109,9 +136,9 @@ struct pcf2127 {
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struct watchdog_device wdd;
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struct regmap *regmap;
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const struct pcf21xx_config *cfg;
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time64_t ts;
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bool ts_valid;
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bool irq_enabled;
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time64_t ts[PCF2127_MAX_TS_SUPPORTED]; /* Timestamp values. */
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bool ts_valid[PCF2127_MAX_TS_SUPPORTED]; /* Timestamp valid indication. */
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};
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/*
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@ -441,18 +468,19 @@ static int pcf2127_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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}
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/*
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* This function reads ctrl2 register, caller is responsible for calling
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* pcf2127_wdt_active_ping()
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* This function reads one timestamp function data, caller is responsible for
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* calling pcf2127_wdt_active_ping()
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*/
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static int pcf2127_rtc_ts_read(struct device *dev, time64_t *ts)
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static int pcf2127_rtc_ts_read(struct device *dev, time64_t *ts,
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int ts_id)
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{
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struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
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struct rtc_time tm;
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int ret;
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unsigned char data[7];
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ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_TS_CTRL, data,
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sizeof(data));
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ret = regmap_bulk_read(pcf2127->regmap, pcf2127->cfg->ts[ts_id].reg_base,
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data, sizeof(data));
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if (ret) {
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dev_err(dev, "%s: read error ret=%d\n", __func__, ret);
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return ret;
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@ -482,18 +510,21 @@ static int pcf2127_rtc_ts_read(struct device *dev, time64_t *ts)
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return 0;
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};
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static void pcf2127_rtc_ts_snapshot(struct device *dev)
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static void pcf2127_rtc_ts_snapshot(struct device *dev, int ts_id)
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{
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struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
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int ret;
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/* Let userspace read the first timestamp */
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if (pcf2127->ts_valid)
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if (ts_id >= pcf2127->cfg->ts_count)
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return;
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ret = pcf2127_rtc_ts_read(dev, &pcf2127->ts);
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/* Let userspace read the first timestamp */
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if (pcf2127->ts_valid[ts_id])
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return;
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ret = pcf2127_rtc_ts_read(dev, &pcf2127->ts[ts_id], ts_id);
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if (!ret)
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pcf2127->ts_valid = true;
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pcf2127->ts_valid[ts_id] = true;
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}
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static irqreturn_t pcf2127_rtc_irq(int irq, void *dev)
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@ -514,7 +545,7 @@ static irqreturn_t pcf2127_rtc_irq(int irq, void *dev)
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return IRQ_NONE;
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if (ctrl1 & PCF2127_BIT_CTRL1_TSF1 || ctrl2 & PCF2127_BIT_CTRL2_TSF2)
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pcf2127_rtc_ts_snapshot(dev);
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pcf2127_rtc_ts_snapshot(dev, 0);
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if (ctrl1 & PCF2127_CTRL1_IRQ_MASK)
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regmap_write(pcf2127->regmap, PCF2127_REG_CTRL1,
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@ -543,28 +574,41 @@ static const struct rtc_class_ops pcf2127_rtc_ops = {
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/* sysfs interface */
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static ssize_t timestamp0_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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static ssize_t timestamp_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count, int ts_id)
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{
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struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
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int ret;
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if (ts_id >= pcf2127->cfg->ts_count)
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return 0;
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if (pcf2127->irq_enabled) {
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pcf2127->ts_valid = false;
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pcf2127->ts_valid[ts_id] = false;
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} else {
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ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
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PCF2127_BIT_CTRL1_TSF1, 0);
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/* Always clear GND interrupt bit. */
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ret = regmap_update_bits(pcf2127->regmap,
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pcf2127->cfg->ts[ts_id].gnd_detect_reg,
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pcf2127->cfg->ts[ts_id].gnd_detect_bit,
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0);
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if (ret) {
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dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret);
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dev_err(dev, "%s: update TS gnd detect ret=%d\n", __func__, ret);
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return ret;
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}
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ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
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PCF2127_BIT_CTRL2_TSF2, 0);
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if (ret) {
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dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret);
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return ret;
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if (pcf2127->cfg->ts[ts_id].inter_detect_bit) {
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/* Clear intermediate level interrupt bit if supported. */
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ret = regmap_update_bits(pcf2127->regmap,
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pcf2127->cfg->ts[ts_id].inter_detect_reg,
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pcf2127->cfg->ts[ts_id].inter_detect_bit,
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0);
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if (ret) {
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dev_err(dev, "%s: update TS intermediate level detect ret=%d\n",
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__func__, ret);
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return ret;
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}
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}
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ret = pcf2127_wdt_active_ping(&pcf2127->wdd);
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@ -573,34 +617,63 @@ static ssize_t timestamp0_store(struct device *dev,
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}
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return count;
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}
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static ssize_t timestamp0_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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return timestamp_store(dev, attr, buf, count, 0);
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};
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static ssize_t timestamp0_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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static ssize_t timestamp_show(struct device *dev,
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struct device_attribute *attr, char *buf,
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int ts_id)
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{
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struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent);
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unsigned int ctrl1, ctrl2;
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int ret;
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time64_t ts;
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if (ts_id >= pcf2127->cfg->ts_count)
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return 0;
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if (pcf2127->irq_enabled) {
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if (!pcf2127->ts_valid)
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if (!pcf2127->ts_valid[ts_id])
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return 0;
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ts = pcf2127->ts;
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ts = pcf2127->ts[ts_id];
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} else {
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ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL1, &ctrl1);
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u8 valid_low = 0;
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u8 valid_inter = 0;
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unsigned int ctrl;
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/* Check if TS input pin is driven to GND, supported by all
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* variants.
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*/
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ret = regmap_read(pcf2127->regmap,
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pcf2127->cfg->ts[ts_id].gnd_detect_reg,
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&ctrl);
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if (ret)
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return 0;
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ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL2, &ctrl2);
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if (ret)
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valid_low = ctrl & pcf2127->cfg->ts[ts_id].gnd_detect_bit;
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if (pcf2127->cfg->ts[ts_id].inter_detect_bit) {
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/* Check if TS input pin is driven to intermediate level
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* between GND and supply, if supported by variant.
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*/
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ret = regmap_read(pcf2127->regmap,
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pcf2127->cfg->ts[ts_id].inter_detect_reg,
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&ctrl);
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if (ret)
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return 0;
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valid_inter = ctrl & pcf2127->cfg->ts[ts_id].inter_detect_bit;
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}
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if (!valid_low && !valid_inter)
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return 0;
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if (!(ctrl1 & PCF2127_BIT_CTRL1_TSF1) &&
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!(ctrl2 & PCF2127_BIT_CTRL2_TSF2))
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return 0;
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ret = pcf2127_rtc_ts_read(dev->parent, &ts);
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ret = pcf2127_rtc_ts_read(dev->parent, &ts, ts_id);
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if (ret)
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return 0;
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@ -609,6 +682,12 @@ static ssize_t timestamp0_show(struct device *dev,
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return ret;
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}
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return sprintf(buf, "%llu\n", (unsigned long long)ts);
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}
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static ssize_t timestamp0_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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return timestamp_show(dev, attr, buf, 0);
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};
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static DEVICE_ATTR_RW(timestamp0);
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@ -618,10 +697,6 @@ static struct attribute *pcf2127_attrs[] = {
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NULL
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};
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static const struct attribute_group pcf2127_attr_group = {
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.attrs = pcf2127_attrs,
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};
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static struct pcf21xx_config pcf21xx_cfg[] = {
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[PCF2127] = {
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.type = PCF2127,
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@ -633,6 +708,19 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
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.reg_wd_ctl = PCF2127_REG_WD_CTL,
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.reg_wd_val = PCF2127_REG_WD_VAL,
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.reg_clkout = PCF2127_REG_CLKOUT,
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.ts_count = 1,
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.ts[0] = {
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.reg_base = PCF2127_REG_TS1_BASE,
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.gnd_detect_reg = PCF2127_REG_CTRL1,
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.gnd_detect_bit = PCF2127_BIT_CTRL1_TSF1,
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.inter_detect_reg = PCF2127_REG_CTRL2,
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.inter_detect_bit = PCF2127_BIT_CTRL2_TSF2,
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.ie_reg = PCF2127_REG_CTRL2,
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.ie_bit = PCF2127_BIT_CTRL2_TSIE,
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},
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.attribute_group = {
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.attrs = pcf2127_attrs,
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},
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},
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[PCF2129] = {
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.type = PCF2129,
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@ -644,9 +732,74 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
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.reg_wd_ctl = PCF2127_REG_WD_CTL,
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.reg_wd_val = PCF2127_REG_WD_VAL,
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.reg_clkout = PCF2127_REG_CLKOUT,
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.ts_count = 1,
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.ts[0] = {
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.reg_base = PCF2127_REG_TS1_BASE,
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.gnd_detect_reg = PCF2127_REG_CTRL1,
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.gnd_detect_bit = PCF2127_BIT_CTRL1_TSF1,
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.inter_detect_reg = PCF2127_REG_CTRL2,
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.inter_detect_bit = PCF2127_BIT_CTRL2_TSF2,
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.ie_reg = PCF2127_REG_CTRL2,
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.ie_bit = PCF2127_BIT_CTRL2_TSIE,
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},
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.attribute_group = {
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.attrs = pcf2127_attrs,
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},
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},
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};
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/*
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* Enable timestamp function and corresponding interrupt(s).
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*/
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static int pcf2127_enable_ts(struct device *dev, int ts_id)
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{
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struct pcf2127 *pcf2127 = dev_get_drvdata(dev);
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int ret;
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if (ts_id >= pcf2127->cfg->ts_count) {
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dev_err(dev, "%s: invalid tamper detection ID (%d)\n",
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__func__, ts_id);
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return -EINVAL;
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}
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/* Enable timestamp function. */
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ret = regmap_update_bits(pcf2127->regmap,
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pcf2127->cfg->ts[ts_id].reg_base,
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PCF2127_BIT_TS_CTRL_TSOFF |
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PCF2127_BIT_TS_CTRL_TSM,
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PCF2127_BIT_TS_CTRL_TSM);
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if (ret) {
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dev_err(dev, "%s: tamper detection config (ts%d_ctrl) failed\n",
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__func__, ts_id);
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return ret;
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}
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/* TS input pin driven to GND detection is supported by all variants.
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* Make sure that interrupt bit is defined.
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*/
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if (pcf2127->cfg->ts[ts_id].gnd_detect_bit == 0) {
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dev_err(dev, "%s: tamper detection to GND configuration invalid\n",
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__func__);
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return ret;
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}
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/*
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* Enable interrupt generation when TSF timestamp flag is set.
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* Interrupt signals are open-drain outputs and can be left floating if
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* unused.
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*/
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ret = regmap_update_bits(pcf2127->regmap, pcf2127->cfg->ts[ts_id].ie_reg,
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pcf2127->cfg->ts[ts_id].ie_bit,
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pcf2127->cfg->ts[ts_id].ie_bit);
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if (ret) {
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dev_err(dev, "%s: tamper detection TSIE%d config failed\n",
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__func__, ts_id);
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return ret;
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}
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return ret;
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}
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static int pcf2127_probe(struct device *dev, struct regmap *regmap,
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int alarm_irq, const char *name, const struct pcf21xx_config *config)
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{
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@ -777,34 +930,15 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
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}
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/*
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* Enable timestamp function and store timestamp of first trigger
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* event until TSF1 and TSF2 interrupt flags are cleared.
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* Enable timestamp functions 1 to 4.
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*/
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ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL,
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PCF2127_BIT_TS_CTRL_TSOFF |
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PCF2127_BIT_TS_CTRL_TSM,
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PCF2127_BIT_TS_CTRL_TSM);
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if (ret) {
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dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n",
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__func__);
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return ret;
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for (int i = 0; i < pcf2127->cfg->ts_count; i++) {
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ret = pcf2127_enable_ts(dev, i);
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if (ret)
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return ret;
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}
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/*
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* Enable interrupt generation when TSF1 or TSF2 timestamp flags
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* are set. Interrupt signal is an open-drain output and can be
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* left floating if unused.
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*/
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ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2,
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PCF2127_BIT_CTRL2_TSIE,
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PCF2127_BIT_CTRL2_TSIE);
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if (ret) {
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dev_err(dev, "%s: tamper detection config (ctrl2) failed\n",
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__func__);
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return ret;
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}
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ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group);
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ret = rtc_add_group(pcf2127->rtc, &pcf2127->cfg->attribute_group);
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if (ret) {
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dev_err(dev, "%s: tamper sysfs registering failed\n",
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__func__);
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