forked from mirrors/linux
		
	i2c: designware: Don't set SCL timings and speed mode when in slave mode
According to data sheet SCL timing parameters and DW_IC_CON SPEED mode bits are not used when operating in slave mode. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Luis Oliveira <lolivei@synopsys.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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					 2 changed files with 0 additions and 75 deletions
				
			
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					@ -201,17 +201,6 @@ static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
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			 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
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								 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
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	dev->mode = DW_IC_SLAVE;
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						dev->mode = DW_IC_SLAVE;
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	switch (dev->clk_freq) {
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	case 100000:
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		dev->slave_cfg |= DW_IC_CON_SPEED_STD;
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		break;
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	case 3400000:
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		dev->slave_cfg |= DW_IC_CON_SPEED_HIGH;
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		break;
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	default:
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		dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
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	}
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}
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					}
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static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
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					static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
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					@ -51,9 +51,7 @@ static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev)
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 */
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					 */
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static int i2c_dw_init_slave(struct dw_i2c_dev *dev)
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					static int i2c_dw_init_slave(struct dw_i2c_dev *dev)
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{
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					{
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	u32 sda_falling_time, scl_falling_time;
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	u32 reg, comp_param1;
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						u32 reg, comp_param1;
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	u32 hcnt, lcnt;
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	int ret;
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						int ret;
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	ret = i2c_dw_acquire_lock(dev);
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						ret = i2c_dw_acquire_lock(dev);
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					@ -79,68 +77,6 @@ static int i2c_dw_init_slave(struct dw_i2c_dev *dev)
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	/* Disable the adapter. */
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						/* Disable the adapter. */
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	__i2c_dw_enable_and_wait(dev, false);
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						__i2c_dw_enable_and_wait(dev, false);
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	/* Set standard and fast speed deviders for high/low periods. */
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	sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
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	scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
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	/* Set SCL timing parameters for standard-mode. */
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	if (dev->ss_hcnt && dev->ss_lcnt) {
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		hcnt = dev->ss_hcnt;
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		lcnt = dev->ss_lcnt;
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	} else {
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		hcnt = i2c_dw_scl_hcnt(i2c_dw_clk_rate(dev),
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				       4000,	/* tHD;STA = tHIGH = 4.0 us */
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				       sda_falling_time,
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				       0,	/* 0: DW default, 1: Ideal */
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				       0);	/* No offset */
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		lcnt = i2c_dw_scl_lcnt(i2c_dw_clk_rate(dev),
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				       4700,	/* tLOW = 4.7 us */
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				       scl_falling_time,
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				       0);	/* No offset */
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	}
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	dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
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	dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
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	dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
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	/* Set SCL timing parameters for fast-mode or fast-mode plus. */
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	if ((dev->clk_freq == 1000000) && dev->fp_hcnt && dev->fp_lcnt) {
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		hcnt = dev->fp_hcnt;
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		lcnt = dev->fp_lcnt;
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	} else if (dev->fs_hcnt && dev->fs_lcnt) {
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		hcnt = dev->fs_hcnt;
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		lcnt = dev->fs_lcnt;
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	} else {
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		hcnt = i2c_dw_scl_hcnt(i2c_dw_clk_rate(dev),
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				       600,	/* tHD;STA = tHIGH = 0.6 us */
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				       sda_falling_time,
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				       0,	/* 0: DW default, 1: Ideal */
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				       0);	/* No offset */
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		lcnt = i2c_dw_scl_lcnt(i2c_dw_clk_rate(dev),
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				       1300,	/* tLOW = 1.3 us */
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				       scl_falling_time,
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				       0);	/* No offset */
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	}
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	dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
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	dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
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	dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
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	if ((dev->slave_cfg & DW_IC_CON_SPEED_MASK) ==
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		DW_IC_CON_SPEED_HIGH) {
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		if ((comp_param1 & DW_IC_COMP_PARAM_1_SPEED_MODE_MASK)
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			!= DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) {
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			dev_err(dev->dev, "High Speed not supported!\n");
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			dev->slave_cfg &= ~DW_IC_CON_SPEED_MASK;
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			dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
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		} else if (dev->hs_hcnt && dev->hs_lcnt) {
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			hcnt = dev->hs_hcnt;
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			lcnt = dev->hs_lcnt;
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			dw_writel(dev, hcnt, DW_IC_HS_SCL_HCNT);
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			dw_writel(dev, lcnt, DW_IC_HS_SCL_LCNT);
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			dev_dbg(dev->dev, "HighSpeed-mode HCNT:LCNT = %d:%d\n",
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				hcnt, lcnt);
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		}
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	}
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	/* Configure SDA Hold Time if required. */
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						/* Configure SDA Hold Time if required. */
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	reg = dw_readl(dev, DW_IC_COMP_VERSION);
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						reg = dw_readl(dev, DW_IC_COMP_VERSION);
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	if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
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						if (reg >= DW_IC_SDA_HOLD_MIN_VERS) {
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