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spi: Add capability to perform some transfer with chipselect off

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Some components require a few clock cycles with chipselect off before
or/and after the data transfer done with CS on.

Typically IDT 801034 QUAD PCM CODEC datasheet states "Note *: CCLK
should have one cycle before CS goes low, and two cycles after
CS goes high".

The cycles "before" are implicitely provided by all previous activity
on the SPI bus. But the cycles "after" must be provided in order to
terminate the SPI transfer.

In order to use that kind of component, add a cs_off flag to
spi_transfer struct. When this flag is set, the transfer is performed
with chipselect off. This allows consummer to add a dummy transfer
at the end of the transfer list which is performed with chipselect
OFF, providing the required additional clock cycles.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Link: https://lore.kernel.org/r/434165c46f06d802690208a11e7ea2500e8da4c7.1662558898.git.christophe.leroy@csgroup.eu
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Christophe Leroy 2022-09-07 16:11:25 +02:00 committed by Mark Brown
parent 4b9ef43638
commit 5e0531f6b9
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GPG key ID: 24D68B725D5487D0
2 changed files with 11 additions and 3 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

12
drivers/spi/spi.c
View file

@ -1435,7 +1435,8 @@ static int spi_transfer_one_message(struct spi_controller *ctlr,
struct spi_statistics __percpu *statm = ctlr->pcpu_statistics; struct spi_statistics __percpu *statm = ctlr->pcpu_statistics;
struct spi_statistics __percpu *stats = msg->spi->pcpu_statistics; struct spi_statistics __percpu *stats = msg->spi->pcpu_statistics;
spi_set_cs(msg->spi, true, false); xfer = list_first_entry(&msg->transfers, struct spi_transfer, transfer_list);
spi_set_cs(msg->spi, !xfer->cs_off, false);
SPI_STATISTICS_INCREMENT_FIELD(statm, messages); SPI_STATISTICS_INCREMENT_FIELD(statm, messages);
SPI_STATISTICS_INCREMENT_FIELD(stats, messages); SPI_STATISTICS_INCREMENT_FIELD(stats, messages);
@ -1503,10 +1504,15 @@ static int spi_transfer_one_message(struct spi_controller *ctlr,
&msg->transfers)) { &msg->transfers)) {
keep_cs = true; keep_cs = true;
} else { } else {
spi_set_cs(msg->spi, false, false); if (!xfer->cs_off)
spi_set_cs(msg->spi, false, false);
_spi_transfer_cs_change_delay(msg, xfer); _spi_transfer_cs_change_delay(msg, xfer);
spi_set_cs(msg->spi, true, false); if (!list_next_entry(xfer, transfer_list)->cs_off)
spi_set_cs(msg->spi, true, false);
} }
} else if (!list_is_last(&xfer->transfer_list, &msg->transfers) &&
xfer->cs_off != list_next_entry(xfer, transfer_list)->cs_off) {
spi_set_cs(msg->spi, xfer->cs_off, false);
} }
msg->actual_length += xfer->len; msg->actual_length += xfer->len;

2
include/linux/spi/spi.h
View file

@ -847,6 +847,7 @@ struct spi_res {
* for this transfer. If 0 the default (from @spi_device) is used. * for this transfer. If 0 the default (from @spi_device) is used.
* @dummy_data: indicates transfer is dummy bytes transfer. * @dummy_data: indicates transfer is dummy bytes transfer.
* @cs_change: affects chipselect after this transfer completes * @cs_change: affects chipselect after this transfer completes
* @cs_off: performs the transfer with chipselect off.
* @cs_change_delay: delay between cs deassert and assert when * @cs_change_delay: delay between cs deassert and assert when
* @cs_change is set and @spi_transfer is not the last in @spi_message * @cs_change is set and @spi_transfer is not the last in @spi_message
* @delay: delay to be introduced after this transfer before * @delay: delay to be introduced after this transfer before
@ -959,6 +960,7 @@ struct spi_transfer {
unsigned cs_change:1; unsigned cs_change:1;
unsigned tx_nbits:3; unsigned tx_nbits:3;
unsigned rx_nbits:3; unsigned rx_nbits:3;
unsigned cs_off:1;
#define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */
#define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */
#define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */