forked from mirrors/linux
		
	clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998
The gcc_usb3_phy_pipe_clk is generated by the phy, but is also used by the phy during init. The clock needs to be enabled during the init sequence, but may not be fully active until after the init sequence is complete. This causes a catch-22 if the clock status is checked during enable. As a result, skip the checks to avoid the troubling situation. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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					@ -2544,7 +2544,7 @@ static struct clk_branch gcc_usb3_phy_aux_clk = {
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static struct clk_branch gcc_usb3_phy_pipe_clk = {
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					static struct clk_branch gcc_usb3_phy_pipe_clk = {
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	.halt_reg = 0x50004,
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						.halt_reg = 0x50004,
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	.halt_check = BRANCH_HALT,
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						.halt_check = BRANCH_HALT_SKIP,
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	.clkr = {
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						.clkr = {
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		.enable_reg = 0x50004,
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							.enable_reg = 0x50004,
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		.enable_mask = BIT(0),
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							.enable_mask = BIT(0),
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