forked from mirrors/linux
ARM: OMAP2+: Remove legacy i2c.c platform init code
We can now initialize I2C for mach-omap2 using device tree. And we can move the remaining code in plat-omap/i2c.c into mach-omap1/i2c.c. Note that we cannot remove some of the I2C bus reset functions as they are being used by hwmod code. Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren
parent
f3b78f7289
commit
65fa3e719f
4 changed files with 83 additions and 216 deletions
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@ -19,6 +19,7 @@
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*
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*
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*/
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*/
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#include <linux/i2c.h>
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#include <linux/i2c-omap.h>
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#include <linux/i2c-omap.h>
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#include <mach/mux.h>
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#include <mach/mux.h>
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#include "soc.h"
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#include "soc.h"
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@ -91,6 +92,88 @@ int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *pdata,
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return platform_device_register(pdev);
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return platform_device_register(pdev);
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}
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}
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#define OMAP_I2C_MAX_CONTROLLERS 4
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static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
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#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
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/**
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* omap_i2c_bus_setup - Process command line options for the I2C bus speed
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* @str: String of options
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*
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* This function allow to override the default I2C bus speed for given I2C
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* bus with a command line option.
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*
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* Format: i2c_bus=bus_id,clkrate (in kHz)
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*
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* Returns 1 on success, 0 otherwise.
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*/
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static int __init omap_i2c_bus_setup(char *str)
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{
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int ints[3];
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get_options(str, 3, ints);
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if (ints[0] < 2 || ints[1] < 1 ||
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ints[1] > OMAP_I2C_MAX_CONTROLLERS)
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return 0;
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i2c_pdata[ints[1] - 1].clkrate = ints[2];
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i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
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return 1;
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}
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__setup("i2c_bus=", omap_i2c_bus_setup);
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/*
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* Register busses defined in command line but that are not registered with
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* omap_register_i2c_bus from board initialization code.
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*/
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int __init omap_register_i2c_bus_cmdline(void)
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{
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int i, err = 0;
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for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
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if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
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i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
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err = omap_i2c_add_bus(&i2c_pdata[i], i + 1);
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if (err)
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goto out;
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}
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out:
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return err;
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}
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/**
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* omap_register_i2c_bus - register I2C bus with device descriptors
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* @bus_id: bus id counting from number 1
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* @clkrate: clock rate of the bus in kHz
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* @info: pointer into I2C device descriptor table or NULL
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* @len: number of descriptors in the table
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*
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* Returns 0 on success or an error code.
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*/
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int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len)
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{
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int err;
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BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS);
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if (info) {
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err = i2c_register_board_info(bus_id, info, len);
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if (err)
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return err;
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}
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if (!i2c_pdata[bus_id - 1].clkrate)
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i2c_pdata[bus_id - 1].clkrate = clkrate;
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i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
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return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id);
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}
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static int __init omap_i2c_cmdline(void)
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static int __init omap_i2c_cmdline(void)
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{
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{
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return omap_register_i2c_bus_cmdline();
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return omap_register_i2c_bus_cmdline();
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@ -26,7 +26,6 @@
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#include "prm.h"
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#include "prm.h"
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#include "common.h"
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#include "common.h"
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#include "mux.h"
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#include "i2c.h"
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#include "i2c.h"
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/* In register I2C_CON, Bit 15 is the I2C enable bit */
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/* In register I2C_CON, Bit 15 is the I2C enable bit */
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@ -36,20 +35,6 @@
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#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
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#define MAX_OMAP_I2C_HWMOD_NAME_LEN 16
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static void __init omap2_i2c_mux_pins(int bus_id)
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{
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char mux_name[sizeof("i2c2_scl.i2c2_scl")];
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/* First I2C bus is not muxable */
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if (bus_id == 1)
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return;
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sprintf(mux_name, "i2c%i_scl.i2c%i_scl", bus_id, bus_id);
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omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
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sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id);
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omap_mux_init_signal(mux_name, OMAP_PIN_INPUT);
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}
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/**
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/**
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* omap_i2c_reset - reset the omap i2c module.
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* omap_i2c_reset - reset the omap i2c module.
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* @oh: struct omap_hwmod *
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* @oh: struct omap_hwmod *
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@ -107,85 +92,3 @@ int omap_i2c_reset(struct omap_hwmod *oh)
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return 0;
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return 0;
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}
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}
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static int __init omap_i2c_nr_ports(void)
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{
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int ports = 0;
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if (cpu_is_omap24xx())
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ports = 2;
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else if (cpu_is_omap34xx())
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ports = 3;
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else if (cpu_is_omap44xx())
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ports = 4;
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return ports;
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}
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/*
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* XXX This function is a temporary compatibility wrapper - only
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* needed until the I2C driver can be converted to call
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* omap_pm_set_max_dev_wakeup_lat() and handle a return code.
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*/
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static void omap_pm_set_max_mpu_wakeup_lat_compat(struct device *dev, long t)
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{
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omap_pm_set_max_mpu_wakeup_lat(dev, t);
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}
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static const char name[] = "omap_i2c";
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int __init omap_i2c_add_bus(struct omap_i2c_bus_platform_data *i2c_pdata,
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int bus_id)
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{
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int l;
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struct omap_hwmod *oh;
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struct platform_device *pdev;
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char oh_name[MAX_OMAP_I2C_HWMOD_NAME_LEN];
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struct omap_i2c_bus_platform_data *pdata;
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struct omap_i2c_dev_attr *dev_attr;
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if (bus_id > omap_i2c_nr_ports())
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return -EINVAL;
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omap2_i2c_mux_pins(bus_id);
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l = snprintf(oh_name, MAX_OMAP_I2C_HWMOD_NAME_LEN, "i2c%d", bus_id);
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WARN(l >= MAX_OMAP_I2C_HWMOD_NAME_LEN,
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"String buffer overflow in I2C%d device setup\n", bus_id);
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oh = omap_hwmod_lookup(oh_name);
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if (!oh) {
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pr_err("Could not look up %s\n", oh_name);
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return -EEXIST;
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}
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pdata = i2c_pdata;
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/*
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* pass the hwmod class's CPU-specific knowledge of I2C IP revision in
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* use, and functionality implementation flags, up to the OMAP I2C
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* driver via platform data
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*/
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pdata->rev = oh->class->rev;
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dev_attr = (struct omap_i2c_dev_attr *)oh->dev_attr;
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pdata->flags = dev_attr->flags;
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/*
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* When waiting for completion of a i2c transfer, we need to
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* set a wake up latency constraint for the MPU. This is to
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* ensure quick enough wakeup from idle, when transfer
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* completes.
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* Only omap3 has support for constraints
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*/
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if (cpu_is_omap34xx())
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pdata->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat_compat;
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pdev = omap_device_build(name, bus_id, oh, pdata,
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sizeof(struct omap_i2c_bus_platform_data));
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WARN(IS_ERR(pdev), "Could not build omap_device for %s\n", name);
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return PTR_ERR_OR_ZERO(pdev);
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}
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static int __init omap_i2c_cmdline(void)
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{
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return omap_register_i2c_bus_cmdline();
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}
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omap_subsys_initcall(omap_i2c_cmdline);
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@ -11,6 +11,3 @@ obj-y := sram.o dma.o counter_32k.o
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obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
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obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
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obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
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obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o
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i2c-omap-$(CONFIG_I2C_OMAP) := i2c.o
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obj-y += $(i2c-omap-m) $(i2c-omap-y)
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@ -1,116 +0,0 @@
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/*
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* linux/arch/arm/plat-omap/i2c.c
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*
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* Helper module for board specific I2C bus registration
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*
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* Copyright (C) 2007 Nokia Corporation.
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*
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* Contact: Jarkko Nikula <jhnikula@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/i2c.h>
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#include <linux/i2c-omap.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <plat/i2c.h>
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#define OMAP_I2C_MAX_CONTROLLERS 4
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static struct omap_i2c_bus_platform_data i2c_pdata[OMAP_I2C_MAX_CONTROLLERS];
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#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
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/**
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* omap_i2c_bus_setup - Process command line options for the I2C bus speed
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* @str: String of options
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*
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* This function allow to override the default I2C bus speed for given I2C
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* bus with a command line option.
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*
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* Format: i2c_bus=bus_id,clkrate (in kHz)
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*
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* Returns 1 on success, 0 otherwise.
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*/
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static int __init omap_i2c_bus_setup(char *str)
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{
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int ints[3];
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get_options(str, 3, ints);
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if (ints[0] < 2 || ints[1] < 1 ||
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ints[1] > OMAP_I2C_MAX_CONTROLLERS)
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return 0;
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i2c_pdata[ints[1] - 1].clkrate = ints[2];
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i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
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return 1;
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}
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__setup("i2c_bus=", omap_i2c_bus_setup);
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/*
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* Register busses defined in command line but that are not registered with
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* omap_register_i2c_bus from board initialization code.
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*/
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int __init omap_register_i2c_bus_cmdline(void)
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{
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int i, err = 0;
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for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
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if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
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i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
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err = omap_i2c_add_bus(&i2c_pdata[i], i + 1);
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if (err)
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goto out;
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}
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out:
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return err;
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}
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/**
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* omap_register_i2c_bus - register I2C bus with device descriptors
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* @bus_id: bus id counting from number 1
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* @clkrate: clock rate of the bus in kHz
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* @info: pointer into I2C device descriptor table or NULL
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* @len: number of descriptors in the table
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*
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* Returns 0 on success or an error code.
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*/
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int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
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struct i2c_board_info const *info,
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unsigned len)
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{
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int err;
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BUG_ON(bus_id < 1 || bus_id > OMAP_I2C_MAX_CONTROLLERS);
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if (info) {
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err = i2c_register_board_info(bus_id, info, len);
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if (err)
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return err;
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}
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if (!i2c_pdata[bus_id - 1].clkrate)
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i2c_pdata[bus_id - 1].clkrate = clkrate;
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i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
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return omap_i2c_add_bus(&i2c_pdata[bus_id - 1], bus_id);
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}
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