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Revert "fec: Restart PPS after link state change"

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This reverts commit f79959220f, this is
creating multiple issues, just not ready to be merged yet.

Link: https://lore.kernel.org/all/20220905180542.GA3685102@roeck-us.net/
Link: https://lore.kernel.org/all/CAHk-=wj1obPoTu1AHj9Bd_BGYjdjDyPP+vT5WMj8eheb3A9WHw@mail.gmail.com/
Fixes: f79959220f ("fec: Restart PPS after link state change")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Francesco Dolcini 2022-09-12 09:01:42 +02:00 committed by Paolo Abeni
parent 807e5eda20
commit 7b15515fc1
3 changed files with 4 additions and 77 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

10
drivers/net/ethernet/freescale/fec.h
View file

@ -638,13 +638,6 @@ struct fec_enet_private {
int pps_enable; int pps_enable;
unsigned int next_counter; unsigned int next_counter;
struct {
struct timespec64 ts_phc;
u64 ns_sys;
u32 at_corr;
u8 at_inc_corr;
} ptp_saved_state;
u64 ethtool_stats[]; u64 ethtool_stats[];
}; };
@ -655,8 +648,5 @@ void fec_ptp_disable_hwts(struct net_device *ndev);
int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr); int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr);
int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr); int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr);
void fec_ptp_save_state(struct fec_enet_private *fep);
int fec_ptp_restore_state(struct fec_enet_private *fep);
/****************************************************************************/ /****************************************************************************/
#endif /* FEC_H */ #endif /* FEC_H */

42
drivers/net/ethernet/freescale/fec_main.c
View file

@ -286,11 +286,8 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
#define FEC_MMFR_TA (2 << 16) #define FEC_MMFR_TA (2 << 16)
#define FEC_MMFR_DATA(v) (v & 0xffff) #define FEC_MMFR_DATA(v) (v & 0xffff)
/* FEC ECR bits definition */ /* FEC ECR bits definition */
#define FEC_ECR_RESET BIT(0) #define FEC_ECR_MAGICEN (1 << 2)
#define FEC_ECR_ETHEREN BIT(1) #define FEC_ECR_SLEEP (1 << 3)
#define FEC_ECR_MAGICEN BIT(2)
#define FEC_ECR_SLEEP BIT(3)
#define FEC_ECR_EN1588 BIT(4)
#define FEC_MII_TIMEOUT 30000 /* us */ #define FEC_MII_TIMEOUT 30000 /* us */
@ -986,9 +983,6 @@ fec_restart(struct net_device *ndev)
u32 temp_mac[2]; u32 temp_mac[2];
u32 rcntl = OPT_FRAME_SIZE | 0x04; u32 rcntl = OPT_FRAME_SIZE | 0x04;
u32 ecntl = 0x2; /* ETHEREN */ u32 ecntl = 0x2; /* ETHEREN */
struct ptp_clock_request ptp_rq = { .type = PTP_CLK_REQ_PPS };
fec_ptp_save_state(fep);
/* Whack a reset. We should wait for this. /* Whack a reset. We should wait for this.
* For i.MX6SX SOC, enet use AXI bus, we use disable MAC * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
@ -1142,7 +1136,7 @@ fec_restart(struct net_device *ndev)
} }
if (fep->bufdesc_ex) if (fep->bufdesc_ex)
ecntl |= FEC_ECR_EN1588; ecntl |= (1 << 4);
if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT && if (fep->quirks & FEC_QUIRK_DELAYED_CLKS_SUPPORT &&
fep->rgmii_txc_dly) fep->rgmii_txc_dly)
@ -1163,14 +1157,6 @@ fec_restart(struct net_device *ndev)
if (fep->bufdesc_ex) if (fep->bufdesc_ex)
fec_ptp_start_cyclecounter(ndev); fec_ptp_start_cyclecounter(ndev);
/* Restart PPS if needed */
if (fep->pps_enable) {
/* Clear flag so fec_ptp_enable_pps() doesn't return immediately */
fep->pps_enable = 0;
fec_ptp_restore_state(fep);
fep->ptp_caps.enable(&fep->ptp_caps, &ptp_rq, 1);
}
/* Enable interrupts we wish to service */ /* Enable interrupts we wish to service */
if (fep->link) if (fep->link)
writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
@ -1221,8 +1207,6 @@ fec_stop(struct net_device *ndev)
struct fec_enet_private *fep = netdev_priv(ndev); struct fec_enet_private *fep = netdev_priv(ndev);
u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8); u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
u32 val; u32 val;
struct ptp_clock_request ptp_rq = { .type = PTP_CLK_REQ_PPS };
u32 ecntl = 0;
/* We cannot expect a graceful transmit stop without link !!! */ /* We cannot expect a graceful transmit stop without link !!! */
if (fep->link) { if (fep->link) {
@ -1232,8 +1216,6 @@ fec_stop(struct net_device *ndev)
netdev_err(ndev, "Graceful transmit stop did not complete!\n"); netdev_err(ndev, "Graceful transmit stop did not complete!\n");
} }
fec_ptp_save_state(fep);
/* Whack a reset. We should wait for this. /* Whack a reset. We should wait for this.
* For i.MX6SX SOC, enet use AXI bus, we use disable MAC * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
* instead of reset MAC itself. * instead of reset MAC itself.
@ -1253,28 +1235,12 @@ fec_stop(struct net_device *ndev)
writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED); writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
if (fep->bufdesc_ex)
ecntl |= FEC_ECR_EN1588;
/* We have to keep ENET enabled to have MII interrupt stay working */ /* We have to keep ENET enabled to have MII interrupt stay working */
if (fep->quirks & FEC_QUIRK_ENET_MAC && if (fep->quirks & FEC_QUIRK_ENET_MAC &&
!(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) { !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) {
ecntl |= FEC_ECR_ETHEREN; writel(2, fep->hwp + FEC_ECNTRL);
writel(rmii_mode, fep->hwp + FEC_R_CNTRL); writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
} }
writel(ecntl, fep->hwp + FEC_ECNTRL);
if (fep->bufdesc_ex)
fec_ptp_start_cyclecounter(ndev);
/* Restart PPS if needed */
if (fep->pps_enable) {
/* Clear flag so fec_ptp_enable_pps() doesn't return immediately */
fep->pps_enable = 0;
fec_ptp_restore_state(fep);
fep->ptp_caps.enable(&fep->ptp_caps, &ptp_rq, 1);
}
} }

29
drivers/net/ethernet/freescale/fec_ptp.c
View file

@ -625,36 +625,7 @@ void fec_ptp_stop(struct platform_device *pdev)
struct net_device *ndev = platform_get_drvdata(pdev); struct net_device *ndev = platform_get_drvdata(pdev);
struct fec_enet_private *fep = netdev_priv(ndev); struct fec_enet_private *fep = netdev_priv(ndev);
if (fep->pps_enable)
fec_ptp_enable_pps(fep, 0);
cancel_delayed_work_sync(&fep->time_keep); cancel_delayed_work_sync(&fep->time_keep);
if (fep->ptp_clock) if (fep->ptp_clock)
ptp_clock_unregister(fep->ptp_clock); ptp_clock_unregister(fep->ptp_clock);
} }
void fec_ptp_save_state(struct fec_enet_private *fep)
{
u32 atime_inc_corr;
fec_ptp_gettime(&fep->ptp_caps, &fep->ptp_saved_state.ts_phc);
fep->ptp_saved_state.ns_sys = ktime_get_ns();
fep->ptp_saved_state.at_corr = readl(fep->hwp + FEC_ATIME_CORR);
atime_inc_corr = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_CORR_MASK;
fep->ptp_saved_state.at_inc_corr = (u8)(atime_inc_corr >> FEC_T_INC_CORR_OFFSET);
}
int fec_ptp_restore_state(struct fec_enet_private *fep)
{
u32 atime_inc = readl(fep->hwp + FEC_ATIME_INC) & FEC_T_INC_MASK;
u64 ns_sys;
writel(fep->ptp_saved_state.at_corr, fep->hwp + FEC_ATIME_CORR);
atime_inc |= ((u32)fep->ptp_saved_state.at_inc_corr) << FEC_T_INC_CORR_OFFSET;
writel(atime_inc, fep->hwp + FEC_ATIME_INC);
ns_sys = ktime_get_ns() - fep->ptp_saved_state.ns_sys;
timespec64_add_ns(&fep->ptp_saved_state.ts_phc, ns_sys);
return fec_ptp_settime(&fep->ptp_caps, &fep->ptp_saved_state.ts_phc);
}