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	PCI: mediatek: Add new method to get shared pcie-cfg base address
For the new dts format, add a new method to get shared pcie-cfg base address and use it to configure the PCIECFG controller Link: https://lore.kernel.org/r/20210823032800.1660-3-chuanjia.liu@mediatek.com Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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					 1 changed files with 17 additions and 0 deletions
				
			
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			@ -14,6 +14,7 @@
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/msi.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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			@ -23,6 +24,7 @@
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include "../pci.h"
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			@ -207,6 +209,7 @@ struct mtk_pcie_port {
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 * struct mtk_pcie - PCIe host information
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 * @dev: pointer to PCIe device
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 * @base: IO mapped register base
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 * @cfg: IO mapped register map for PCIe config
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 * @free_ck: free-run reference clock
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 * @mem: non-prefetchable memory resource
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 * @ports: pointer to PCIe port information
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			@ -215,6 +218,7 @@ struct mtk_pcie_port {
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struct mtk_pcie {
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	struct device *dev;
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	void __iomem *base;
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	struct regmap *cfg;
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	struct clk *free_ck;
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	struct list_head ports;
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			@ -682,6 +686,10 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
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		val |= PCIE_CSR_LTSSM_EN(port->slot) |
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		       PCIE_CSR_ASPM_L1_EN(port->slot);
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		writel(val, pcie->base + PCIE_SYS_CFG_V2);
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	} else if (pcie->cfg) {
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		val = PCIE_CSR_LTSSM_EN(port->slot) |
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		      PCIE_CSR_ASPM_L1_EN(port->slot);
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		regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val);
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	}
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	/* Assert all reset signals */
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			@ -985,6 +993,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
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	struct device *dev = pcie->dev;
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	struct platform_device *pdev = to_platform_device(dev);
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	struct resource *regs;
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	struct device_node *cfg_node;
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	int err;
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	/* get shared registers, which are optional */
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			@ -995,6 +1004,14 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
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			return PTR_ERR(pcie->base);
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	}
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	cfg_node = of_find_compatible_node(NULL, NULL,
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					   "mediatek,generic-pciecfg");
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	if (cfg_node) {
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		pcie->cfg = syscon_node_to_regmap(cfg_node);
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		if (IS_ERR(pcie->cfg))
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			return PTR_ERR(pcie->cfg);
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	}
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	pcie->free_ck = devm_clk_get(dev, "free_ck");
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	if (IS_ERR(pcie->free_ck)) {
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		if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER)
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