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MIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controller

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On SGI Origin 2k/Onyx2 and SGI Octane systems, there can exist multiple PCI
buses attached to the Xtalk bus.  The current code will stop counting PCI buses
after it finds the first one.  If one installs the optional PCI cardcage
("shoebox") into these systems, because of the order of the Xtalk widgets, the
current PCI code will find the cardcage first, and fail to detect the BaseIO
PCI devices, which are on a higher Xtalk widget ID.

This patch adds the hooks needed for resolving this issue in the IP27 PCI code
(in a later patch).

Verified on both an SGI Onyx2 and an SGI Octane.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Cc: Linux MIPS List <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/9074/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Joshua Kinard 2015-01-19 04:19:20 -05:00 committed by Ralf Baechle
parent 3db2742554
commit a2e50f53d5
3 changed files with 7 additions and 1 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

2
arch/mips/include/asm/pci.h
View file

@ -35,6 +35,8 @@ struct pci_controller {
struct resource *io_resource; struct resource *io_resource;
unsigned long io_offset; unsigned long io_offset;
unsigned long io_map_base; unsigned long io_map_base;
struct resource *busn_resource;
unsigned long busn_offset;
unsigned int index; unsigned int index;
/* For compatibility with current (as of July 2003) pciutils /* For compatibility with current (as of July 2003) pciutils

1
arch/mips/include/asm/pci/bridge.h
View file

@ -835,6 +835,7 @@ struct bridge_controller {
struct pci_controller pc; struct pci_controller pc;
struct resource mem; struct resource mem;
struct resource io; struct resource io;
struct resource busn;
bridge_t *base; bridge_t *base;
nasid_t nasid; nasid_t nasid;
unsigned int widget_id; unsigned int widget_id;

5
arch/mips/pci/pci.c
View file

@ -91,7 +91,10 @@ static void pcibios_scanbus(struct pci_controller *hose)
pci_add_resource_offset(&resources, pci_add_resource_offset(&resources,
hose->mem_resource, hose->mem_offset); hose->mem_resource, hose->mem_offset);
pci_add_resource_offset(&resources, hose->io_resource, hose->io_offset); pci_add_resource_offset(&resources,
hose->io_resource, hose->io_offset);
pci_add_resource_offset(&resources,
hose->busn_resource, hose->busn_offset);
bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
&resources); &resources);
if (!bus) if (!bus)