forked from mirrors/linux
		
	net: dsa: felix: convert to the new .change_tag_protocol DSA API
In expectation of the new tag_ocelot_8021q tagger implementation, we need to be able to do runtime switchover between one tagger and another. So we must structure the existing code for the current NPI-based tagger in a certain way. We move the felix_npi_port_init function in expectation of the future driver configuration necessary for tag_ocelot_8021q: we would like to not have the NPI-related bits interspersed with the tag_8021q bits. The conversion from this: ocelot_write_rix(ocelot, ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), ANA_PGID_PGID, PGID_UC); to this: cpu_flood = ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports)); ocelot_rmw_rix(ocelot, cpu_flood, cpu_flood, ANA_PGID_PGID, PGID_UC); is perhaps non-trivial, but is nonetheless non-functional. The PGID_UC (replicator for unknown unicast) is already configured out of hardware reset to flood to all ports except ocelot->num_phys_ports (the CPU port module). All we change is that we use a read-modify-write to only add the CPU port module to the unknown unicast replicator, as opposed to doing a full write to the register. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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					 4 changed files with 154 additions and 35 deletions
				
			
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			@ -1,5 +1,5 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright 2019 NXP Semiconductors
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/* Copyright 2019-2021 NXP Semiconductors
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 *
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 * This is an umbrella module for all network switches that are
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 * register-compatible with Ocelot and that perform I/O to their host CPU
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			@ -24,11 +24,140 @@
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#include <net/dsa.h>
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#include "felix.h"
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/* The CPU port module is connected to the Node Processor Interface (NPI). This
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 * is the mode through which frames can be injected from and extracted to an
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 * external CPU, over Ethernet. In NXP SoCs, the "external CPU" is the ARM CPU
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 * running Linux, and this forms a DSA setup together with the enetc or fman
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 * DSA master.
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 */
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static void felix_npi_port_init(struct ocelot *ocelot, int port)
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{
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	ocelot->npi = port;
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	ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
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		     QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
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		     QSYS_EXT_CPU_CFG);
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	/* NPI port Injection/Extraction configuration */
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	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
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			    ocelot->npi_xtr_prefix);
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	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
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			    ocelot->npi_inj_prefix);
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	/* Disable transmission of pause frames */
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	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
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}
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static void felix_npi_port_deinit(struct ocelot *ocelot, int port)
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{
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	/* Restore hardware defaults */
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	int unused_port = ocelot->num_phys_ports + 2;
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	ocelot->npi = -1;
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	ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPU_PORT(unused_port),
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		     QSYS_EXT_CPU_CFG);
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	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
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			    OCELOT_TAG_PREFIX_DISABLED);
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	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
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			    OCELOT_TAG_PREFIX_DISABLED);
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	/* Enable transmission of pause frames */
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	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 1);
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}
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static int felix_setup_tag_npi(struct dsa_switch *ds, int cpu)
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{
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	struct ocelot *ocelot = ds->priv;
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	unsigned long cpu_flood;
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	felix_npi_port_init(ocelot, cpu);
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	/* Include the CPU port module (and indirectly, the NPI port)
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	 * in the forwarding mask for unknown unicast - the hardware
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	 * default value for ANA_FLOODING_FLD_UNICAST excludes
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	 * BIT(ocelot->num_phys_ports), and so does ocelot_init,
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	 * since Ocelot relies on whitelisting MAC addresses towards
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	 * PGID_CPU.
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	 * We do this because DSA does not yet perform RX filtering,
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	 * and the NPI port does not perform source address learning,
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	 * so traffic sent to Linux is effectively unknown from the
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	 * switch's perspective.
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	 */
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	cpu_flood = ANA_PGID_PGID_PGID(BIT(ocelot->num_phys_ports));
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	ocelot_rmw_rix(ocelot, cpu_flood, cpu_flood, ANA_PGID_PGID, PGID_UC);
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	return 0;
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}
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static void felix_teardown_tag_npi(struct dsa_switch *ds, int cpu)
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{
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	struct ocelot *ocelot = ds->priv;
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	felix_npi_port_deinit(ocelot, cpu);
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}
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static int felix_set_tag_protocol(struct dsa_switch *ds, int cpu,
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				  enum dsa_tag_protocol proto)
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{
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	int err;
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	switch (proto) {
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	case DSA_TAG_PROTO_OCELOT:
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		err = felix_setup_tag_npi(ds, cpu);
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		break;
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	default:
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		err = -EPROTONOSUPPORT;
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	}
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	return err;
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}
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static void felix_del_tag_protocol(struct dsa_switch *ds, int cpu,
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				   enum dsa_tag_protocol proto)
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{
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	switch (proto) {
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	case DSA_TAG_PROTO_OCELOT:
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		felix_teardown_tag_npi(ds, cpu);
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		break;
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	default:
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		break;
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	}
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}
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static int felix_change_tag_protocol(struct dsa_switch *ds, int cpu,
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				     enum dsa_tag_protocol proto)
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{
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	struct ocelot *ocelot = ds->priv;
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	struct felix *felix = ocelot_to_felix(ocelot);
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	enum dsa_tag_protocol old_proto = felix->tag_proto;
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	int err;
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	if (proto != DSA_TAG_PROTO_OCELOT)
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		return -EPROTONOSUPPORT;
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	felix_del_tag_protocol(ds, cpu, old_proto);
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	err = felix_set_tag_protocol(ds, cpu, proto);
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	if (err) {
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		felix_set_tag_protocol(ds, cpu, old_proto);
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		return err;
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	}
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	felix->tag_proto = proto;
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	return 0;
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}
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static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
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						    int port,
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						    enum dsa_tag_protocol mp)
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{
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	return DSA_TAG_PROTO_OCELOT;
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	struct ocelot *ocelot = ds->priv;
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	struct felix *felix = ocelot_to_felix(ocelot);
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	return felix->tag_proto;
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}
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static int felix_set_ageing_time(struct dsa_switch *ds,
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			@ -527,28 +656,6 @@ static int felix_init_structs(struct felix *felix, int num_phys_ports)
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	return 0;
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}
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/* The CPU port module is connected to the Node Processor Interface (NPI). This
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 * is the mode through which frames can be injected from and extracted to an
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 * external CPU, over Ethernet.
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 */
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static void felix_npi_port_init(struct ocelot *ocelot, int port)
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{
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	ocelot->npi = port;
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	ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
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		     QSYS_EXT_CPU_CFG_EXT_CPU_PORT(port),
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		     QSYS_EXT_CPU_CFG);
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	/* NPI port Injection/Extraction configuration */
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	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_XTR_HDR,
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			    ocelot->npi_xtr_prefix);
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	ocelot_fields_write(ocelot, port, SYS_PORT_MODE_INCL_INJ_HDR,
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			    ocelot->npi_inj_prefix);
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	/* Disable transmission of pause frames */
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	ocelot_fields_write(ocelot, port, SYS_PAUSE_CFG_PAUSE_ENA, 0);
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}
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/* Hardware initialization done here so that we can allocate structures with
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 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
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 * us to allocate structures twice (leak memory) and map PCI memory twice
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			@ -578,10 +685,10 @@ static int felix_setup(struct dsa_switch *ds)
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	}
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	for (port = 0; port < ds->num_ports; port++) {
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		ocelot_init_port(ocelot, port);
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		if (dsa_is_unused_port(ds, port))
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			continue;
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		if (dsa_is_cpu_port(ds, port))
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			felix_npi_port_init(ocelot, port);
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		ocelot_init_port(ocelot, port);
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		/* Set the default QoS Classification based on PCP and DEI
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		 * bits of vlan tag.
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			@ -593,14 +700,15 @@ static int felix_setup(struct dsa_switch *ds)
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	if (err)
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		return err;
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	/* Include the CPU port module in the forwarding mask for unknown
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	 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST
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	 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since
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	 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU.
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	 */
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	ocelot_write_rix(ocelot,
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			 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)),
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			 ANA_PGID_PGID, PGID_UC);
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	for (port = 0; port < ds->num_ports; port++) {
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		if (!dsa_is_cpu_port(ds, port))
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			continue;
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		/* The initial tag protocol is NPI which always returns 0, so
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		 * there's no real point in checking for errors.
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		 */
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		felix_set_tag_protocol(ds, port, felix->tag_proto);
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	}
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	ds->mtu_enforcement_ingress = true;
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	ds->assisted_learning_on_cpu_port = true;
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			@ -614,6 +722,13 @@ static void felix_teardown(struct dsa_switch *ds)
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	struct felix *felix = ocelot_to_felix(ocelot);
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	int port;
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	for (port = 0; port < ds->num_ports; port++) {
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		if (!dsa_is_cpu_port(ds, port))
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			continue;
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		felix_del_tag_protocol(ds, port, felix->tag_proto);
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	}
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	ocelot_devlink_sb_unregister(ocelot);
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	ocelot_deinit_timestamp(ocelot);
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	ocelot_deinit(ocelot);
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			@ -860,6 +975,7 @@ static int felix_sb_occ_tc_port_bind_get(struct dsa_switch *ds, int port,
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const struct dsa_switch_ops felix_switch_ops = {
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	.get_tag_protocol		= felix_get_tag_protocol,
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	.change_tag_protocol		= felix_change_tag_protocol,
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	.setup				= felix_setup,
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	.teardown			= felix_teardown,
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	.set_ageing_time		= felix_set_ageing_time,
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			@ -48,6 +48,7 @@ struct felix {
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	struct lynx_pcs			**pcs;
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	resource_size_t			switch_base;
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	resource_size_t			imdio_base;
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	enum dsa_tag_protocol		tag_proto;
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};
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struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port);
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			@ -1467,6 +1467,7 @@ static int felix_pci_probe(struct pci_dev *pdev,
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	ds->ops = &felix_switch_ops;
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	ds->priv = ocelot;
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	felix->ds = ds;
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	felix->tag_proto = DSA_TAG_PROTO_OCELOT;
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	err = dsa_register_switch(ds);
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	if (err) {
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			@ -1246,6 +1246,7 @@ static int seville_probe(struct platform_device *pdev)
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	ds->ops = &felix_switch_ops;
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	ds->priv = ocelot;
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	felix->ds = ds;
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	felix->tag_proto = DSA_TAG_PROTO_OCELOT;
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	err = dsa_register_switch(ds);
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	if (err) {
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