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ARM: dts: r8a7779: Add SYSC PM Domains

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Add a device node for the System Controller.
Hook up ARM CPU cores 1-3 to their respective PM Domains.
Note that ARM CPU core 0 cannot be shut off.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2015-06-03 10:14:01 +02:00 committed by Simon Horman
parent 03ef285fd7
commit b2df3aa487
1 changed files with 10 additions and 0 deletions
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10
arch/arm/boot/dts/r8a7779.dtsi
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@ -14,6 +14,7 @@
#include <dt-bindings/clock/r8a7779-clock.h> #include <dt-bindings/clock/r8a7779-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/r8a7779-sysc.h>
/ { / {
compatible = "renesas,r8a7779"; compatible = "renesas,r8a7779";
@ -34,18 +35,21 @@ cpu@1 {
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <1>; reg = <1>;
clock-frequency = <1000000000>; clock-frequency = <1000000000>;
power-domains = <&sysc R8A7779_PD_ARM1>;
}; };
cpu@2 { cpu@2 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <2>; reg = <2>;
clock-frequency = <1000000000>; clock-frequency = <1000000000>;
power-domains = <&sysc R8A7779_PD_ARM2>;
}; };
cpu@3 { cpu@3 {
device_type = "cpu"; device_type = "cpu";
compatible = "arm,cortex-a9"; compatible = "arm,cortex-a9";
reg = <3>; reg = <3>;
clock-frequency = <1000000000>; clock-frequency = <1000000000>;
power-domains = <&sysc R8A7779_PD_ARM3>;
}; };
}; };
@ -586,4 +590,10 @@ R8A7779_CLK_MMC1 R8A7779_CLK_MMC0
"mmc1", "mmc0"; "mmc1", "mmc0";
}; };
}; };
sysc: system-controller@ffd85000 {
compatible = "renesas,r8a7779-sysc";
reg = <0xffd85000 0x0200>;
#power-domain-cells = <1>;
};
}; };