forked from mirrors/linux
		
	ARM: mvebu: define crypto SRAM ranges for all armada-xp boards
Define the crypto SRAM ranges so that the resources referenced by the sa-sram node can be properly extracted from the DT. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This commit is contained in:
		
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					 9 changed files with 27 additions and 9 deletions
				
			
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					@ -69,7 +69,9 @@ memory {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
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								  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								  MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								  MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		pcie-controller {
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							pcie-controller {
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			status = "okay";
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								status = "okay";
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					@ -75,7 +75,9 @@ memory {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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			  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
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								  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
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								  MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								  MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		devbus-bootcs {
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							devbus-bootcs {
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			status = "okay";
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								status = "okay";
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					@ -94,7 +94,9 @@ pm_pic {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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			  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000>;
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								  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
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								  MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								  MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		devbus-bootcs {
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							devbus-bootcs {
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			status = "okay";
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								status = "okay";
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					@ -64,7 +64,9 @@ memory {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
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			MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
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								MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		pcie-controller {
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							pcie-controller {
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			status = "okay";
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								status = "okay";
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					@ -69,7 +69,9 @@ memory {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
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								  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								  MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								  MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		pcie-controller {
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							pcie-controller {
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			status = "okay";
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								status = "okay";
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					@ -67,7 +67,9 @@ memory {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
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								  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								  MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								  MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		internal-regs {
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							internal-regs {
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			serial@12000 {
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								serial@12000 {
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					@ -63,7 +63,9 @@ memory {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
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			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
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								  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								  MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								  MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		pcie-controller {
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							pcie-controller {
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			status = "okay";
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								status = "okay";
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					@ -65,7 +65,9 @@ memory {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
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			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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			  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000>;
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								  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x8000000
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								  MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								  MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		devbus-bootcs {
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							devbus-bootcs {
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			status = "okay";
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								status = "okay";
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					@ -77,7 +77,9 @@ memory {
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	soc {
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						soc {
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		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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							ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
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								  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
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								  MBUS_ID(0x09, 0x09) 0 0 0xf8100000 0x10000
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								  MBUS_ID(0x09, 0x05) 0 0 0xf8110000 0x10000>;
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		pcie-controller {
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							pcie-controller {
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			status = "okay";
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								status = "okay";
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