forked from mirrors/linux
net: phy: drop phy_settings and the associated lookup helpers
The phy_settings array is no longer relevant as it has now been replaced by the link_caps array and associated phy_caps helpers. Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Link: https://patch.msgid.link/20250307173611.129125-11-maxime.chevallier@bootlin.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Maxime Chevallier
Paolo Abeni
parent
de7d3f87be
commit
ce60fef7fe
2 changed files with 0 additions and 197 deletions
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@ -157,190 +157,6 @@ int phy_interface_num_ports(phy_interface_t interface)
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}
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EXPORT_SYMBOL_GPL(phy_interface_num_ports);
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/* A mapping of all SUPPORTED settings to speed/duplex. This table
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* must be grouped by speed and sorted in descending match priority
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* - iow, descending speed.
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*/
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#define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
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.bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
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static const struct phy_setting settings[] = {
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/* 800G */
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PHY_SETTING( 800000, FULL, 800000baseCR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseKR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseDR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseDR8_2_Full ),
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PHY_SETTING( 800000, FULL, 800000baseSR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseVR8_Full ),
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PHY_SETTING( 800000, FULL, 800000baseCR4_Full ),
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PHY_SETTING( 800000, FULL, 800000baseKR4_Full ),
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PHY_SETTING( 800000, FULL, 800000baseDR4_Full ),
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PHY_SETTING( 800000, FULL, 800000baseDR4_2_Full ),
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PHY_SETTING( 800000, FULL, 800000baseSR4_Full ),
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PHY_SETTING( 800000, FULL, 800000baseVR4_Full ),
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/* 400G */
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PHY_SETTING( 400000, FULL, 400000baseCR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseKR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseDR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseSR8_Full ),
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PHY_SETTING( 400000, FULL, 400000baseCR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseKR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseDR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseSR4_Full ),
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PHY_SETTING( 400000, FULL, 400000baseCR2_Full ),
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PHY_SETTING( 400000, FULL, 400000baseKR2_Full ),
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PHY_SETTING( 400000, FULL, 400000baseDR2_Full ),
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PHY_SETTING( 400000, FULL, 400000baseDR2_2_Full ),
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PHY_SETTING( 400000, FULL, 400000baseSR2_Full ),
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PHY_SETTING( 400000, FULL, 400000baseVR2_Full ),
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/* 200G */
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PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
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PHY_SETTING( 200000, FULL, 200000baseCR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseKR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseDR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseSR2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseCR_Full ),
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PHY_SETTING( 200000, FULL, 200000baseKR_Full ),
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PHY_SETTING( 200000, FULL, 200000baseDR_Full ),
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PHY_SETTING( 200000, FULL, 200000baseDR_2_Full ),
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PHY_SETTING( 200000, FULL, 200000baseSR_Full ),
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PHY_SETTING( 200000, FULL, 200000baseVR_Full ),
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/* 100G */
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PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
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PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
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PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
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PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
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PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
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PHY_SETTING( 100000, FULL, 100000baseCR_Full ),
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PHY_SETTING( 100000, FULL, 100000baseKR_Full ),
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PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full ),
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PHY_SETTING( 100000, FULL, 100000baseDR_Full ),
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PHY_SETTING( 100000, FULL, 100000baseSR_Full ),
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/* 56G */
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PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
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PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
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PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
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PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
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/* 50G */
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PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
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PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
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PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
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PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
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PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
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PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
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PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
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PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
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/* 40G */
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PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
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PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
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PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
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PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
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/* 25G */
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PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
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PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
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PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
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/* 20G */
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PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
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PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
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/* 10G */
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PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
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PHY_SETTING( 10000, FULL, 10000baseER_Full ),
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PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
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PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
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PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
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PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
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PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
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PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
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PHY_SETTING( 10000, FULL, 10000baseT_Full ),
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/* 5G */
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PHY_SETTING( 5000, FULL, 5000baseT_Full ),
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/* 2.5G */
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PHY_SETTING( 2500, FULL, 2500baseT_Full ),
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PHY_SETTING( 2500, FULL, 2500baseX_Full ),
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/* 1G */
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PHY_SETTING( 1000, FULL, 1000baseT_Full ),
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PHY_SETTING( 1000, HALF, 1000baseT_Half ),
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PHY_SETTING( 1000, FULL, 1000baseT1_Full ),
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PHY_SETTING( 1000, FULL, 1000baseX_Full ),
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PHY_SETTING( 1000, FULL, 1000baseKX_Full ),
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/* 100M */
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PHY_SETTING( 100, FULL, 100baseT_Full ),
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PHY_SETTING( 100, FULL, 100baseT1_Full ),
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PHY_SETTING( 100, HALF, 100baseT_Half ),
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PHY_SETTING( 100, HALF, 100baseFX_Half ),
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PHY_SETTING( 100, FULL, 100baseFX_Full ),
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/* 10M */
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PHY_SETTING( 10, FULL, 10baseT_Full ),
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PHY_SETTING( 10, HALF, 10baseT_Half ),
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PHY_SETTING( 10, FULL, 10baseT1L_Full ),
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PHY_SETTING( 10, FULL, 10baseT1S_Full ),
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PHY_SETTING( 10, HALF, 10baseT1S_Half ),
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PHY_SETTING( 10, HALF, 10baseT1S_P2MP_Half ),
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PHY_SETTING( 10, FULL, 10baseT1BRR_Full ),
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};
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#undef PHY_SETTING
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/**
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* phy_lookup_setting - lookup a PHY setting
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* @speed: speed to match
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* @duplex: duplex to match
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* @mask: allowed link modes
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* @exact: an exact match is required
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*
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* Search the settings array for a setting that matches the speed and
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* duplex, and which is supported.
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*
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* If @exact is unset, either an exact match or %NULL for no match will
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* be returned.
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*
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* If @exact is set, an exact match, the fastest supported setting at
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* or below the specified speed, the slowest supported setting, or if
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* they all fail, %NULL will be returned.
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*/
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const struct phy_setting *
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phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
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{
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const struct phy_setting *p, *match = NULL, *last = NULL;
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int i;
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for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
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if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
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test_bit(p->bit, mask)) {
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last = p;
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if (p->speed == speed && p->duplex == duplex) {
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/* Exact match for speed and duplex */
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match = p;
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break;
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} else if (!exact) {
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if (!match && p->speed <= speed)
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/* Candidate */
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match = p;
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if (p->speed < speed)
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break;
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}
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}
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}
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if (!match && !exact)
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match = last;
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return match;
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}
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EXPORT_SYMBOL_GPL(phy_lookup_setting);
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static void __set_phy_supported(struct phy_device *phydev, u32 max_speed)
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{
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phy_caps_linkmode_max_speed(max_speed, phydev->supported);
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@ -1275,19 +1275,6 @@ const char *phy_rate_matching_to_str(int rate_matching);
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int phy_interface_num_ports(phy_interface_t interface);
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/* A structure for mapping a particular speed and duplex
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* combination to a particular SUPPORTED and ADVERTISED value
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*/
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struct phy_setting {
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u32 speed;
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u8 duplex;
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u8 bit;
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};
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const struct phy_setting *
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phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
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bool exact);
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/**
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* phy_is_started - Convenience function to check whether PHY is started
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* @phydev: The phy_device struct
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