forked from mirrors/linux
		
	net/mlx5: Enable devlink port for embedded cpu VF vports
Enable creation of a devlink port for EC VF vports. Signed-off-by: Daniel Jurgens <danielj@nvidia.com> Reviewed-by: William Tu <witu@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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					 3 changed files with 33 additions and 1 deletions
				
			
		|  | @ -18,7 +18,8 @@ static bool mlx5_esw_devlink_port_supported(struct mlx5_eswitch *esw, u16 vport_ | |||
| { | ||||
| 	return vport_num == MLX5_VPORT_UPLINK || | ||||
| 	       (mlx5_core_is_ecpf(esw->dev) && vport_num == MLX5_VPORT_PF) || | ||||
| 	       mlx5_eswitch_is_vf_vport(esw, vport_num); | ||||
| 	       mlx5_eswitch_is_vf_vport(esw, vport_num) || | ||||
| 	       mlx5_core_is_ec_vf_vport(esw->dev, vport_num); | ||||
| } | ||||
| 
 | ||||
| static struct devlink_port *mlx5_esw_dl_port_alloc(struct mlx5_eswitch *esw, u16 vport_num) | ||||
|  | @ -56,6 +57,11 @@ static struct devlink_port *mlx5_esw_dl_port_alloc(struct mlx5_eswitch *esw, u16 | |||
| 		dl_port->attrs.switch_id.id_len = ppid.id_len; | ||||
| 		devlink_port_attrs_pci_vf_set(dl_port, controller_num, pfnum, | ||||
| 					      vport_num - 1, external); | ||||
| 	}  else if (mlx5_core_is_ec_vf_vport(esw->dev, vport_num)) { | ||||
| 		memcpy(dl_port->attrs.switch_id.id, ppid.id, ppid.id_len); | ||||
| 		dl_port->attrs.switch_id.id_len = ppid.id_len; | ||||
| 		devlink_port_attrs_pci_vf_set(dl_port, controller_num, pfnum, | ||||
| 					      vport_num - 1, false); | ||||
| 	} | ||||
| 	return dl_port; | ||||
| } | ||||
|  |  | |||
|  | @ -343,4 +343,24 @@ bool mlx5_rdma_supported(struct mlx5_core_dev *dev); | |||
| bool mlx5_vnet_supported(struct mlx5_core_dev *dev); | ||||
| bool mlx5_same_hw_devs(struct mlx5_core_dev *dev, struct mlx5_core_dev *peer_dev); | ||||
| 
 | ||||
| static inline u16 mlx5_core_ec_vf_vport_base(const struct mlx5_core_dev *dev) | ||||
| { | ||||
| 	return MLX5_CAP_GEN_2(dev, ec_vf_vport_base); | ||||
| } | ||||
| 
 | ||||
| static inline u16 mlx5_core_ec_sriov_enabled(const struct mlx5_core_dev *dev) | ||||
| { | ||||
| 	return mlx5_core_is_ecpf(dev) && mlx5_core_ec_vf_vport_base(dev); | ||||
| } | ||||
| 
 | ||||
| static inline bool mlx5_core_is_ec_vf_vport(const struct mlx5_core_dev *dev, u16 vport_num) | ||||
| { | ||||
| 	int base_vport = mlx5_core_ec_vf_vport_base(dev); | ||||
| 	int max_vport = base_vport + mlx5_core_max_ec_vfs(dev); | ||||
| 
 | ||||
| 	if (!mlx5_core_ec_sriov_enabled(dev)) | ||||
| 		return false; | ||||
| 
 | ||||
| 	return (vport_num >= base_vport && vport_num < max_vport); | ||||
| } | ||||
| #endif /* __MLX5_CORE_H__ */ | ||||
|  |  | |||
|  | @ -474,6 +474,7 @@ struct mlx5_core_sriov { | |||
| 	struct mlx5_vf_context	*vfs_ctx; | ||||
| 	int			num_vfs; | ||||
| 	u16			max_vfs; | ||||
| 	u16			max_ec_vfs; | ||||
| }; | ||||
| 
 | ||||
| struct mlx5_fc_pool { | ||||
|  | @ -1244,6 +1245,11 @@ static inline u16 mlx5_core_max_vfs(const struct mlx5_core_dev *dev) | |||
| 	return dev->priv.sriov.max_vfs; | ||||
| } | ||||
| 
 | ||||
| static inline u16 mlx5_core_max_ec_vfs(const struct mlx5_core_dev *dev) | ||||
| { | ||||
| 	return dev->priv.sriov.max_ec_vfs; | ||||
| } | ||||
| 
 | ||||
| static inline int mlx5_get_gid_table_len(u16 param) | ||||
| { | ||||
| 	if (param > 4) { | ||||
|  |  | |||
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	 Daniel Jurgens
						Daniel Jurgens