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PCI: Return u16 from pci_find_ext_capability() and similar

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PCI Express Extended Capabilities are in config space between offsets 256
and 4K.  These offsets all fit in 16 bits.

Change the return type of pci_find_ext_capability() and supporting
functions from int to u16 to match the specification.  Many callers use
"int", which is fine, but there's no need to store more than a u16.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas 2020-12-04 15:14:07 -06:00
parent f646c2a0a6
commit ee8b1c478a
2 changed files with 6 additions and 6 deletions
repo.diff.show_diff_stats Download patch file Download diff file Expand all files Collapse all files

6
drivers/pci/pci.c
View file

@ -527,11 +527,11 @@ EXPORT_SYMBOL(pci_bus_find_capability);
* not support it. Some capabilities can occur several times, e.g., the * not support it. Some capabilities can occur several times, e.g., the
* vendor-specific capability, and this provides a way to find them all. * vendor-specific capability, and this provides a way to find them all.
*/ */
int pci_find_next_ext_capability(struct pci_dev *dev, int start, int cap) u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 start, int cap)
{ {
u32 header; u32 header;
int ttl; int ttl;
int pos = PCI_CFG_SPACE_SIZE; u16 pos = PCI_CFG_SPACE_SIZE;
/* minimum 8 bytes per capability */ /* minimum 8 bytes per capability */
ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8; ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
@ -582,7 +582,7 @@ EXPORT_SYMBOL_GPL(pci_find_next_ext_capability);
* %PCI_EXT_CAP_ID_DSN Device Serial Number * %PCI_EXT_CAP_ID_DSN Device Serial Number
* %PCI_EXT_CAP_ID_PWR Power Budgeting * %PCI_EXT_CAP_ID_PWR Power Budgeting
*/ */
int pci_find_ext_capability(struct pci_dev *dev, int cap) u16 pci_find_ext_capability(struct pci_dev *dev, int cap)
{ {
return pci_find_next_ext_capability(dev, 0, cap); return pci_find_next_ext_capability(dev, 0, cap);
} }

6
include/linux/pci.h
View file

@ -381,7 +381,7 @@ struct pci_dev {
struct pcie_link_state *link_state; /* ASPM link state */ struct pcie_link_state *link_state; /* ASPM link state */
unsigned int ltr_path:1; /* Latency Tolerance Reporting unsigned int ltr_path:1; /* Latency Tolerance Reporting
supported from root to here */ supported from root to here */
int l1ss; /* L1SS Capability pointer */ u16 l1ss; /* L1SS Capability pointer */
#endif #endif
unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */ unsigned int eetlp_prefix_path:1; /* End-to-End TLP Prefix */
@ -1069,8 +1069,8 @@ u8 pci_find_capability(struct pci_dev *dev, int cap);
u8 pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); u8 pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap); u8 pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
u8 pci_find_next_ht_capability(struct pci_dev *dev, u8 pos, int ht_cap); u8 pci_find_next_ht_capability(struct pci_dev *dev, u8 pos, int ht_cap);
int pci_find_ext_capability(struct pci_dev *dev, int cap); u16 pci_find_ext_capability(struct pci_dev *dev, int cap);
int pci_find_next_ext_capability(struct pci_dev *dev, int pos, int cap); u16 pci_find_next_ext_capability(struct pci_dev *dev, u16 pos, int cap);
struct pci_bus *pci_find_next_bus(const struct pci_bus *from); struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
u64 pci_get_dsn(struct pci_dev *dev); u64 pci_get_dsn(struct pci_dev *dev);