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	 b886d83c5b
			
		
	
	
		b886d83c5b
		
	
	
	
	
		
			
			Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 315 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Armijn Hemel <armijn@tjaldur.nl> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190115.503150771@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			49 lines
		
	
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			49 lines
		
	
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
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|  *
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|  * Author: Tony Li <tony.li@freescale.com>
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|  *	   Jason Jin <Jason.jin@freescale.com>
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|  */
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| #ifndef _POWERPC_SYSDEV_FSL_MSI_H
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| #define _POWERPC_SYSDEV_FSL_MSI_H
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| 
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| #include <linux/of.h>
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| #include <asm/msi_bitmap.h>
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| 
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| #define NR_MSI_REG_MSIIR	8  /* MSIIR can index 8 MSI registers */
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| #define NR_MSI_REG_MSIIR1	16 /* MSIIR1 can index 16 MSI registers */
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| #define NR_MSI_REG_MAX		NR_MSI_REG_MSIIR1
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| #define IRQS_PER_MSI_REG	32
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| #define NR_MSI_IRQS_MAX	(NR_MSI_REG_MAX * IRQS_PER_MSI_REG)
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| 
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| #define FSL_PIC_IP_MASK   0x0000000F
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| #define FSL_PIC_IP_MPIC   0x00000001
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| #define FSL_PIC_IP_IPIC   0x00000002
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| #define FSL_PIC_IP_VMPIC  0x00000003
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| 
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| #define MSI_HW_ERRATA_ENDIAN 0x00000010
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| 
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| struct fsl_msi_cascade_data;
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| 
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| struct fsl_msi {
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| 	struct irq_domain *irqhost;
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| 
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| 	unsigned long cascade_irq;
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| 
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| 	u32 msiir_offset; /* Offset of MSIIR, relative to start of CCSR */
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| 	u32 ibs_shift; /* Shift of interrupt bit select */
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| 	u32 srs_shift; /* Shift of the shared interrupt register select */
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| 	void __iomem *msi_regs;
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| 	u32 feature;
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| 	struct fsl_msi_cascade_data *cascade_array[NR_MSI_REG_MAX];
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| 
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| 	struct msi_bitmap bitmap;
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| 
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| 	struct list_head list;          /* support multiple MSI banks */
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| 
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| 	phandle phandle;
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| };
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| 
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| #endif /* _POWERPC_SYSDEV_FSL_MSI_H */
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| 
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