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	 8ddde07a3d
			
		
	
	
		8ddde07a3d
		
	
	
	
	
		
			
			kernel/dma/map_benchmark.c and selftests/dma/dma_map_benchmark.c have duplicate map_benchmark definitions, which tends to lead to inconsistent changes to map_benchmark on both sides, extract a common header file to avoid this problem. Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Acked-by: Barry Song <song.bao.hua@hisilicon.com> Reviewed-by: Shuah Khan <skhan@linuxfoundation.org> Signed-off-by: Christoph Hellwig <hch@lst.de>
		
			
				
	
	
		
			31 lines
		
	
	
	
		
			1.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			31 lines
		
	
	
	
		
			1.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * Copyright (C) 2022 HiSilicon Limited.
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|  */
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| 
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| #ifndef _KERNEL_DMA_BENCHMARK_H
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| #define _KERNEL_DMA_BENCHMARK_H
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| 
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| #define DMA_MAP_BENCHMARK       _IOWR('d', 1, struct map_benchmark)
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| #define DMA_MAP_MAX_THREADS     1024
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| #define DMA_MAP_MAX_SECONDS     300
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| #define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC)
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| 
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| #define DMA_MAP_BIDIRECTIONAL   0
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| #define DMA_MAP_TO_DEVICE       1
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| #define DMA_MAP_FROM_DEVICE     2
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| 
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| struct map_benchmark {
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| 	__u64 avg_map_100ns; /* average map latency in 100ns */
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| 	__u64 map_stddev; /* standard deviation of map latency */
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| 	__u64 avg_unmap_100ns; /* as above */
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| 	__u64 unmap_stddev;
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| 	__u32 threads; /* how many threads will do map/unmap in parallel */
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| 	__u32 seconds; /* how long the test will last */
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| 	__s32 node; /* which numa node this benchmark will run on */
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| 	__u32 dma_bits; /* DMA addressing capability */
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| 	__u32 dma_dir; /* DMA data direction */
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| 	__u32 dma_trans_ns; /* time for DMA transmission in ns */
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| 	__u32 granule;  /* how many PAGE_SIZE will do map/unmap once a time */
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| };
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| #endif /* _KERNEL_DMA_BENCHMARK_H */
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