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		d2912cb15b
		
	
	
	
	
		
			
			Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			249 lines
		
	
	
	
		
			7.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			249 lines
		
	
	
	
		
			7.4 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * Functions to access MAX8907 power management chip.
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|  *
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|  * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
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|  * Copyright (C) 2012, NVIDIA CORPORATION. All rights reserved.
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|  */
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| 
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| #ifndef __LINUX_MFD_MAX8907_H
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| #define __LINUX_MFD_MAX8907_H
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| 
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| #include <linux/mutex.h>
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| #include <linux/pm.h>
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| 
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| #define MAX8907_GEN_I2C_ADDR		(0x78 >> 1)
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| #define MAX8907_ADC_I2C_ADDR		(0x8e >> 1)
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| #define MAX8907_RTC_I2C_ADDR		(0xd0 >> 1)
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| 
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| /* MAX8907 register map */
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| #define MAX8907_REG_SYSENSEL		0x00
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| #define MAX8907_REG_ON_OFF_IRQ1		0x01
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| #define MAX8907_REG_ON_OFF_IRQ1_MASK	0x02
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| #define MAX8907_REG_ON_OFF_STAT		0x03
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| #define MAX8907_REG_SDCTL1		0x04
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| #define MAX8907_REG_SDSEQCNT1		0x05
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| #define MAX8907_REG_SDV1		0x06
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| #define MAX8907_REG_SDCTL2		0x07
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| #define MAX8907_REG_SDSEQCNT2		0x08
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| #define MAX8907_REG_SDV2		0x09
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| #define MAX8907_REG_SDCTL3		0x0A
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| #define MAX8907_REG_SDSEQCNT3		0x0B
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| #define MAX8907_REG_SDV3		0x0C
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| #define MAX8907_REG_ON_OFF_IRQ2		0x0D
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| #define MAX8907_REG_ON_OFF_IRQ2_MASK	0x0E
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| #define MAX8907_REG_RESET_CNFG		0x0F
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| #define MAX8907_REG_LDOCTL16		0x10
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| #define MAX8907_REG_LDOSEQCNT16		0x11
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| #define MAX8907_REG_LDO16VOUT		0x12
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| #define MAX8907_REG_SDBYSEQCNT		0x13
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| #define MAX8907_REG_LDOCTL17		0x14
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| #define MAX8907_REG_LDOSEQCNT17		0x15
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| #define MAX8907_REG_LDO17VOUT		0x16
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| #define MAX8907_REG_LDOCTL1		0x18
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| #define MAX8907_REG_LDOSEQCNT1		0x19
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| #define MAX8907_REG_LDO1VOUT		0x1A
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| #define MAX8907_REG_LDOCTL2		0x1C
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| #define MAX8907_REG_LDOSEQCNT2		0x1D
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| #define MAX8907_REG_LDO2VOUT		0x1E
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| #define MAX8907_REG_LDOCTL3		0x20
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| #define MAX8907_REG_LDOSEQCNT3		0x21
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| #define MAX8907_REG_LDO3VOUT		0x22
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| #define MAX8907_REG_LDOCTL4		0x24
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| #define MAX8907_REG_LDOSEQCNT4		0x25
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| #define MAX8907_REG_LDO4VOUT		0x26
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| #define MAX8907_REG_LDOCTL5		0x28
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| #define MAX8907_REG_LDOSEQCNT5		0x29
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| #define MAX8907_REG_LDO5VOUT		0x2A
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| #define MAX8907_REG_LDOCTL6		0x2C
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| #define MAX8907_REG_LDOSEQCNT6		0x2D
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| #define MAX8907_REG_LDO6VOUT		0x2E
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| #define MAX8907_REG_LDOCTL7		0x30
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| #define MAX8907_REG_LDOSEQCNT7		0x31
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| #define MAX8907_REG_LDO7VOUT		0x32
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| #define MAX8907_REG_LDOCTL8		0x34
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| #define MAX8907_REG_LDOSEQCNT8		0x35
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| #define MAX8907_REG_LDO8VOUT		0x36
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| #define MAX8907_REG_LDOCTL9		0x38
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| #define MAX8907_REG_LDOSEQCNT9		0x39
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| #define MAX8907_REG_LDO9VOUT		0x3A
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| #define MAX8907_REG_LDOCTL10		0x3C
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| #define MAX8907_REG_LDOSEQCNT10		0x3D
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| #define MAX8907_REG_LDO10VOUT		0x3E
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| #define MAX8907_REG_LDOCTL11		0x40
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| #define MAX8907_REG_LDOSEQCNT11		0x41
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| #define MAX8907_REG_LDO11VOUT		0x42
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| #define MAX8907_REG_LDOCTL12		0x44
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| #define MAX8907_REG_LDOSEQCNT12		0x45
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| #define MAX8907_REG_LDO12VOUT		0x46
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| #define MAX8907_REG_LDOCTL13		0x48
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| #define MAX8907_REG_LDOSEQCNT13		0x49
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| #define MAX8907_REG_LDO13VOUT		0x4A
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| #define MAX8907_REG_LDOCTL14		0x4C
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| #define MAX8907_REG_LDOSEQCNT14		0x4D
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| #define MAX8907_REG_LDO14VOUT		0x4E
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| #define MAX8907_REG_LDOCTL15		0x50
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| #define MAX8907_REG_LDOSEQCNT15		0x51
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| #define MAX8907_REG_LDO15VOUT		0x52
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| #define MAX8907_REG_OUT5VEN		0x54
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| #define MAX8907_REG_OUT5VSEQ		0x55
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| #define MAX8907_REG_OUT33VEN		0x58
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| #define MAX8907_REG_OUT33VSEQ		0x59
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| #define MAX8907_REG_LDOCTL19		0x5C
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| #define MAX8907_REG_LDOSEQCNT19		0x5D
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| #define MAX8907_REG_LDO19VOUT		0x5E
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| #define MAX8907_REG_LBCNFG		0x60
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| #define MAX8907_REG_SEQ1CNFG		0x64
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| #define MAX8907_REG_SEQ2CNFG		0x65
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| #define MAX8907_REG_SEQ3CNFG		0x66
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| #define MAX8907_REG_SEQ4CNFG		0x67
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| #define MAX8907_REG_SEQ5CNFG		0x68
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| #define MAX8907_REG_SEQ6CNFG		0x69
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| #define MAX8907_REG_SEQ7CNFG		0x6A
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| #define MAX8907_REG_LDOCTL18		0x72
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| #define MAX8907_REG_LDOSEQCNT18		0x73
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| #define MAX8907_REG_LDO18VOUT		0x74
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| #define MAX8907_REG_BBAT_CNFG		0x78
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| #define MAX8907_REG_CHG_CNTL1		0x7C
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| #define MAX8907_REG_CHG_CNTL2		0x7D
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| #define MAX8907_REG_CHG_IRQ1		0x7E
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| #define MAX8907_REG_CHG_IRQ2		0x7F
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| #define MAX8907_REG_CHG_IRQ1_MASK	0x80
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| #define MAX8907_REG_CHG_IRQ2_MASK	0x81
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| #define MAX8907_REG_CHG_STAT		0x82
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| #define MAX8907_REG_WLED_MODE_CNTL	0x84
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| #define MAX8907_REG_ILED_CNTL		0x84
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| #define MAX8907_REG_II1RR		0x8E
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| #define MAX8907_REG_II2RR		0x8F
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| #define MAX8907_REG_LDOCTL20		0x9C
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| #define MAX8907_REG_LDOSEQCNT20		0x9D
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| #define MAX8907_REG_LDO20VOUT		0x9E
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| 
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| /* RTC register map */
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| #define MAX8907_REG_RTC_SEC		0x00
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| #define MAX8907_REG_RTC_MIN		0x01
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| #define MAX8907_REG_RTC_HOURS		0x02
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| #define MAX8907_REG_RTC_WEEKDAY		0x03
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| #define MAX8907_REG_RTC_DATE		0x04
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| #define MAX8907_REG_RTC_MONTH		0x05
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| #define MAX8907_REG_RTC_YEAR1		0x06
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| #define MAX8907_REG_RTC_YEAR2		0x07
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| #define MAX8907_REG_ALARM0_SEC		0x08
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| #define MAX8907_REG_ALARM0_MIN		0x09
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| #define MAX8907_REG_ALARM0_HOURS	0x0A
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| #define MAX8907_REG_ALARM0_WEEKDAY	0x0B
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| #define MAX8907_REG_ALARM0_DATE		0x0C
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| #define MAX8907_REG_ALARM0_MONTH	0x0D
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| #define MAX8907_REG_ALARM0_YEAR1	0x0E
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| #define MAX8907_REG_ALARM0_YEAR2	0x0F
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| #define MAX8907_REG_ALARM1_SEC		0x10
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| #define MAX8907_REG_ALARM1_MIN		0x11
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| #define MAX8907_REG_ALARM1_HOURS	0x12
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| #define MAX8907_REG_ALARM1_WEEKDAY	0x13
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| #define MAX8907_REG_ALARM1_DATE		0x14
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| #define MAX8907_REG_ALARM1_MONTH	0x15
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| #define MAX8907_REG_ALARM1_YEAR1	0x16
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| #define MAX8907_REG_ALARM1_YEAR2	0x17
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| #define MAX8907_REG_ALARM0_CNTL		0x18
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| #define MAX8907_REG_ALARM1_CNTL		0x19
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| #define MAX8907_REG_RTC_STATUS		0x1A
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| #define MAX8907_REG_RTC_CNTL		0x1B
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| #define MAX8907_REG_RTC_IRQ		0x1C
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| #define MAX8907_REG_RTC_IRQ_MASK	0x1D
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| #define MAX8907_REG_MPL_CNTL		0x1E
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| 
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| /* ADC and Touch Screen Controller register map */
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| #define MAX8907_CTL			0
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| #define MAX8907_SEQCNT			1
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| #define MAX8907_VOUT			2
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| 
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| /* mask bit fields */
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| #define MAX8907_MASK_LDO_SEQ		0x1C
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| #define MAX8907_MASK_LDO_EN		0x01
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| #define MAX8907_MASK_VBBATTCV		0x03
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| #define MAX8907_MASK_OUT5V_VINEN	0x10
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| #define MAX8907_MASK_OUT5V_ENSRC	0x0E
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| #define MAX8907_MASK_OUT5V_EN		0x01
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| #define MAX8907_MASK_POWER_OFF		0x40
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| 
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| /* Regulator IDs */
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| #define MAX8907_MBATT	0
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| #define MAX8907_SD1	1
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| #define MAX8907_SD2	2
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| #define MAX8907_SD3	3
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| #define MAX8907_LDO1	4
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| #define MAX8907_LDO2	5
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| #define MAX8907_LDO3	6
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| #define MAX8907_LDO4	7
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| #define MAX8907_LDO5	8
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| #define MAX8907_LDO6	9
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| #define MAX8907_LDO7	10
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| #define MAX8907_LDO8	11
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| #define MAX8907_LDO9	12
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| #define MAX8907_LDO10	13
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| #define MAX8907_LDO11	14
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| #define MAX8907_LDO12	15
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| #define MAX8907_LDO13	16
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| #define MAX8907_LDO14	17
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| #define MAX8907_LDO15	18
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| #define MAX8907_LDO16	19
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| #define MAX8907_LDO17	20
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| #define MAX8907_LDO18	21
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| #define MAX8907_LDO19	22
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| #define MAX8907_LDO20	23
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| #define MAX8907_OUT5V	24
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| #define MAX8907_OUT33V	25
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| #define MAX8907_BBAT	26
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| #define MAX8907_SDBY	27
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| #define MAX8907_VRTC	28
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| #define MAX8907_NUM_REGULATORS (MAX8907_VRTC + 1)
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| 
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| /* IRQ definitions */
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| enum {
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| 	MAX8907_IRQ_VCHG_DC_OVP = 0,
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| 	MAX8907_IRQ_VCHG_DC_F,
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| 	MAX8907_IRQ_VCHG_DC_R,
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| 	MAX8907_IRQ_VCHG_THM_OK_R,
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| 	MAX8907_IRQ_VCHG_THM_OK_F,
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| 	MAX8907_IRQ_VCHG_MBATTLOW_F,
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| 	MAX8907_IRQ_VCHG_MBATTLOW_R,
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| 	MAX8907_IRQ_VCHG_RST,
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| 	MAX8907_IRQ_VCHG_DONE,
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| 	MAX8907_IRQ_VCHG_TOPOFF,
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| 	MAX8907_IRQ_VCHG_TMR_FAULT,
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| 
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| 	MAX8907_IRQ_GPM_RSTIN = 0,
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| 	MAX8907_IRQ_GPM_MPL,
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| 	MAX8907_IRQ_GPM_SW_3SEC,
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| 	MAX8907_IRQ_GPM_EXTON_F,
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| 	MAX8907_IRQ_GPM_EXTON_R,
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| 	MAX8907_IRQ_GPM_SW_1SEC,
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| 	MAX8907_IRQ_GPM_SW_F,
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| 	MAX8907_IRQ_GPM_SW_R,
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| 	MAX8907_IRQ_GPM_SYSCKEN_F,
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| 	MAX8907_IRQ_GPM_SYSCKEN_R,
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| 
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| 	MAX8907_IRQ_RTC_ALARM1 = 0,
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| 	MAX8907_IRQ_RTC_ALARM0,
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| };
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| 
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| struct max8907_platform_data {
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| 	struct regulator_init_data *init_data[MAX8907_NUM_REGULATORS];
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| 	bool pm_off;
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| };
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| 
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| struct regmap_irq_chips_data;
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| 
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| struct max8907 {
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| 	struct device			*dev;
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| 	struct mutex			irq_lock;
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| 	struct i2c_client		*i2c_gen;
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| 	struct i2c_client		*i2c_rtc;
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| 	struct regmap			*regmap_gen;
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| 	struct regmap			*regmap_rtc;
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| 	struct regmap_irq_chip_data	*irqc_chg;
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| 	struct regmap_irq_chip_data	*irqc_on_off;
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| 	struct regmap_irq_chip_data	*irqc_rtc;
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| };
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| 
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| #endif
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