forked from mirrors/linux
c7c5be5862
Current pattern in the linux kernel is that every new serial driver adds one or more new PORT_ definitions because uart_ops::config_port() callback documentation prescribes setting port->type according to the type of port found, or to PORT_UNKNOWN if no port was detected. When the specific type of the port is not important to the userspace there's no need for a unique PORT_ value, but so far there's no suitable identifier for that case. Provide generic port type identifier other than PORT_UNKNOWN for ports which type is not important to userspace. Suggested-by: Arnd Bergmann <arnd@arndb.de> Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Suggested-by: Jiri Slaby <jirislaby@kernel.org> Reviewed-by: Jiri Slaby <jirislaby@kernel.org> Link: https://lore.kernel.org/r/20231008001804.889727-1-jcmvbkbc@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
237 lines
4.9 KiB
C
237 lines
4.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
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/*
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*/
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#ifndef _UAPILINUX_SERIAL_CORE_H
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#define _UAPILINUX_SERIAL_CORE_H
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#include <linux/serial.h>
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/*
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* The type definitions. These are from Ted Ts'o's serial.h
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* By historical reasons the values from 0 to 13 are defined
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* in the include/uapi/linux/serial.h, do not define them here.
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* Values 0 to 19 are used by setserial from busybox and must never
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* be modified.
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*/
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#define PORT_NS16550A 14
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#define PORT_XSCALE 15
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#define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
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#define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
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#define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
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#define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
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#define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
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#define PORT_XR17D15X 21 /* Exar XR17D15x UART */
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#define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
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#define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */
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#define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
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#define PORT_BRCM_TRUMANAGE 25
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#define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
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#define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
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#define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
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#define PORT_RT2880 29 /* Ralink RT2880 internal UART */
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#define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */
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/*
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* ARM specific type numbers. These are not currently guaranteed
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* to be implemented, and will change in the future. These are
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* separate so any additions to the old serial.c that occur before
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* we are merged can be easily merged here.
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*/
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#define PORT_PXA 31
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#define PORT_AMBA 32
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#define PORT_CLPS711X 33
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#define PORT_SA1100 34
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#define PORT_UART00 35
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#define PORT_OWL 36
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#define PORT_21285 37
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/* Sparc type numbers. */
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#define PORT_SUNZILOG 38
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#define PORT_SUNSAB 39
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/* Nuvoton UART */
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#define PORT_NPCM 40
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/* NVIDIA Tegra Combined UART */
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#define PORT_TEGRA_TCU 41
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/* ASPEED AST2x00 virtual UART */
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#define PORT_ASPEED_VUART 42
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/* Intel EG20 */
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#define PORT_PCH_8LINE 44
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#define PORT_PCH_2LINE 45
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/* DEC */
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#define PORT_DZ 46
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#define PORT_ZS 47
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/* Parisc type numbers. */
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#define PORT_MUX 48
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/* Atmel AT91 SoC */
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#define PORT_ATMEL 49
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/* Macintosh Zilog type numbers */
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#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
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#define PORT_PMAC_ZILOG 51
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/* SH-SCI */
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#define PORT_SCI 52
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#define PORT_SCIF 53
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#define PORT_IRDA 54
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/* SGI IP22 aka Indy / Challenge S / Indigo 2 */
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#define PORT_IP22ZILOG 56
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/* PPC CPM type number */
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#define PORT_CPM 58
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/* MPC52xx (and MPC512x) type numbers */
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#define PORT_MPC52xx 59
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/* IBM icom */
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#define PORT_ICOM 60
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/* Motorola i.MX SoC */
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#define PORT_IMX 62
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/* TXX9 type number */
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#define PORT_TXX9 64
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/*Digi jsm */
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#define PORT_JSM 69
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/* SUN4V Hypervisor Console */
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#define PORT_SUNHV 72
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/* Xilinx uartlite */
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#define PORT_UARTLITE 74
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/* Broadcom BCM7271 UART */
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#define PORT_BCM7271 76
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/* Broadcom SB1250, etc. SOC */
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#define PORT_SB1250_DUART 77
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/* Freescale ColdFire */
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#define PORT_MCF 78
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#define PORT_SC26XX 82
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/* SH-SCI */
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#define PORT_SCIFA 83
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#define PORT_S3C6400 84
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/* MAX3100 */
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#define PORT_MAX3100 86
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/* Timberdale UART */
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#define PORT_TIMBUART 87
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/* Qualcomm MSM SoCs */
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#define PORT_MSM 88
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/* BCM63xx family SoCs */
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#define PORT_BCM63XX 89
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/* Aeroflex Gaisler GRLIB APBUART */
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#define PORT_APBUART 90
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/* Altera UARTs */
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#define PORT_ALTERA_JTAGUART 91
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#define PORT_ALTERA_UART 92
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/* SH-SCI */
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#define PORT_SCIFB 93
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/* MAX310X */
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#define PORT_MAX310X 94
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/* TI DA8xx/66AK2x */
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#define PORT_DA830 95
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/* TI OMAP-UART */
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#define PORT_OMAP 96
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/* VIA VT8500 SoC */
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#define PORT_VT8500 97
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/* Cadence (Xilinx Zynq) UART */
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#define PORT_XUARTPS 98
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/* Atheros AR933X SoC */
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#define PORT_AR933X 99
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/* MCHP 16550A UART with 256 byte FIFOs */
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#define PORT_MCHP16550A 100
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/* ARC (Synopsys) on-chip UART */
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#define PORT_ARC 101
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/* Rocketport EXPRESS/INFINITY */
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#define PORT_RP2 102
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/* Freescale lpuart */
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#define PORT_LPUART 103
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/* SH-SCI */
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#define PORT_HSCIF 104
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/* ST ASC type numbers */
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#define PORT_ASC 105
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/* MEN 16z135 UART */
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#define PORT_MEN_Z135 107
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/* SC16IS7xx */
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#define PORT_SC16IS7XX 108
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/* MESON */
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#define PORT_MESON 109
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/* Conexant Digicolor */
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#define PORT_DIGICOLOR 110
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/* SPRD SERIAL */
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#define PORT_SPRD 111
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/* STM32 USART */
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#define PORT_STM32 113
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/* MVEBU UART */
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#define PORT_MVEBU 114
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/* Microchip PIC32 UART */
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#define PORT_PIC32 115
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/* MPS2 UART */
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#define PORT_MPS2UART 116
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/* MediaTek BTIF */
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#define PORT_MTK_BTIF 117
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/* RDA UART */
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#define PORT_RDA 118
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/* Socionext Milbeaut UART */
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#define PORT_MLB_USIO 119
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/* SiFive UART */
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#define PORT_SIFIVE_V0 120
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/* Sunix UART */
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#define PORT_SUNIX 121
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/* Freescale LINFlexD UART */
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#define PORT_LINFLEXUART 122
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/* Sunplus UART */
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#define PORT_SUNPLUS 123
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/* Generic type identifier for ports which type is not important to userspace. */
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#define PORT_GENERIC (-1)
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#endif /* _UAPILINUX_SERIAL_CORE_H */
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