forked from mirrors/linux
		
	Similar to commita6c30873ee("ARM: 8989/1: use .fpu assembler directives instead of assembler arguments"). GCC and GNU binutils support setting the "sub arch" via -march=, -Wa,-march, target function attribute, and .arch assembler directive. Clang was missing support for -Wa,-march=, but this was implemented in clang-13. The behavior of both GCC and Clang is to prefer -Wa,-march= over -march= for assembler and assembler-with-cpp sources, but Clang will warn about the -march= being unused. clang: warning: argument unused during compilation: '-march=armv6k' [-Wunused-command-line-argument] Since most assembler is non-conditionally assembled with one sub arch (modulo arch/arm/delay-loop.S which conditionally is assembled as armv4 based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the .arch assembler directive. Add a few more instances found in compile testing as found by Arnd and Nathan. Link:1d51c699b9Link: https://bugs.llvm.org/show_bug.cgi?id=48894 Link: https://github.com/ClangBuiltLinux/linux/issues/1195 Link: https://github.com/ClangBuiltLinux/linux/issues/1315 Suggested-by: Arnd Bergmann <arnd@arndb.de> Suggested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
		
			
				
	
	
		
			63 lines
		
	
	
	
		
			1.1 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			63 lines
		
	
	
	
		
			1.1 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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 *  linux/arch/arm/lib/delay.S
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 *
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 *  Copyright (C) 1995, 1996 Russell King
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 */
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/delay.h>
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#ifdef CONFIG_ARCH_RPC
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		.arch	armv4
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#endif
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		.text
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.LC0:		.word	loops_per_jiffy
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.LC1:		.word	UDELAY_MULT
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/*
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 * loops = r0 * HZ * loops_per_jiffy / 1000000
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 *
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 * r0  <= 2000
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 * HZ  <= 1000
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 */
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ENTRY(__loop_udelay)
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		ldr	r2, .LC1
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		mul	r0, r2, r0		@ r0 = delay_us * UDELAY_MULT
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ENTRY(__loop_const_udelay)			@ 0 <= r0 <= 0xfffffaf0
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		ldr	r2, .LC0
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		ldr	r2, [r2]
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		umull	r1, r0, r2, r0		@ r0-r1 = r0 * loops_per_jiffy
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		adds	r1, r1, #0xffffffff	@ rounding up ...
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		adcs	r0, r0, r0		@ and right shift by 31
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		reteq	lr
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		.align 3
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@ Delay routine
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ENTRY(__loop_delay)
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		subs	r0, r0, #1
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#if 0
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		retls	lr
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		subs	r0, r0, #1
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		retls	lr
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		subs	r0, r0, #1
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		retls	lr
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		subs	r0, r0, #1
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		retls	lr
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		subs	r0, r0, #1
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		retls	lr
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		subs	r0, r0, #1
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		retls	lr
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		subs	r0, r0, #1
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		retls	lr
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		subs	r0, r0, #1
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#endif
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		bhi	__loop_delay
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		ret	lr
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ENDPROC(__loop_udelay)
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ENDPROC(__loop_const_udelay)
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ENDPROC(__loop_delay)
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