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	 0c32840763
			
		
	
	
		0c32840763
		
			
		
	
	
	
	
		
			
			Usage of the telem sysfs file allows for partial reads at an offset.
The current callback method returns the buffer starting from offset 0
only.
Include the requested offset in the callback and update the necessary
address calculations with the offset.
Note: offset addition is moved from the caller to the local usage. For
non-callback usage this is unchanged behavior.
Fixes: e92affc74c ("platform/x86/intel/vsec: Add PMT read callbacks")
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
Link: https://lore.kernel.org/r/20241114130358.2467787-2-michael.j.ruhl@intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
		
	
			
		
			
				
	
	
		
			150 lines
		
	
	
	
		
			4.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			150 lines
		
	
	
	
		
			4.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0 */
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| #ifndef _INTEL_VSEC_H
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| #define _INTEL_VSEC_H
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| 
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| #include <linux/auxiliary_bus.h>
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| #include <linux/bits.h>
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| 
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| #define VSEC_CAP_TELEMETRY	BIT(0)
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| #define VSEC_CAP_WATCHER	BIT(1)
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| #define VSEC_CAP_CRASHLOG	BIT(2)
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| #define VSEC_CAP_SDSI		BIT(3)
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| #define VSEC_CAP_TPMI		BIT(4)
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| 
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| /* Intel DVSEC offsets */
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| #define INTEL_DVSEC_ENTRIES		0xA
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| #define INTEL_DVSEC_SIZE		0xB
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| #define INTEL_DVSEC_TABLE		0xC
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| #define INTEL_DVSEC_TABLE_BAR(x)	((x) & GENMASK(2, 0))
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| #define INTEL_DVSEC_TABLE_OFFSET(x)	((x) & GENMASK(31, 3))
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| #define TABLE_OFFSET_SHIFT		3
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| 
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| struct pci_dev;
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| struct resource;
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| 
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| enum intel_vsec_id {
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| 	VSEC_ID_TELEMETRY	= 2,
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| 	VSEC_ID_WATCHER		= 3,
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| 	VSEC_ID_CRASHLOG	= 4,
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| 	VSEC_ID_SDSI		= 65,
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| 	VSEC_ID_TPMI		= 66,
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| };
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| 
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| /**
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|  * struct intel_vsec_header - Common fields of Intel VSEC and DVSEC registers.
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|  * @rev:         Revision ID of the VSEC/DVSEC register space
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|  * @length:      Length of the VSEC/DVSEC register space
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|  * @id:          ID of the feature
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|  * @num_entries: Number of instances of the feature
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|  * @entry_size:  Size of the discovery table for each feature
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|  * @tbir:        BAR containing the discovery tables
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|  * @offset:      BAR offset of start of the first discovery table
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|  */
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| struct intel_vsec_header {
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| 	u8	rev;
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| 	u16	length;
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| 	u16	id;
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| 	u8	num_entries;
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| 	u8	entry_size;
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| 	u8	tbir;
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| 	u32	offset;
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| };
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| 
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| enum intel_vsec_quirks {
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| 	/* Watcher feature not supported */
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| 	VSEC_QUIRK_NO_WATCHER	= BIT(0),
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| 
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| 	/* Crashlog feature not supported */
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| 	VSEC_QUIRK_NO_CRASHLOG	= BIT(1),
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| 
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| 	/* Use shift instead of mask to read discovery table offset */
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| 	VSEC_QUIRK_TABLE_SHIFT	= BIT(2),
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| 
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| 	/* DVSEC not present (provided in driver data) */
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| 	VSEC_QUIRK_NO_DVSEC	= BIT(3),
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| 
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| 	/* Platforms requiring quirk in the auxiliary driver */
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| 	VSEC_QUIRK_EARLY_HW     = BIT(4),
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| };
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| 
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| /**
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|  * struct pmt_callbacks - Callback infrastructure for PMT devices
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|  * ->read_telem() when specified, called by client driver to access PMT data (instead
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|  * of direct copy).
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|  * @pdev:  PCI device reference for the callback's use
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|  * @guid:  ID of data to acccss
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|  * @data:  buffer for the data to be copied
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|  * @off:   offset into the requested buffer
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|  * @count: size of buffer
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|  */
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| struct pmt_callbacks {
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| 	int (*read_telem)(struct pci_dev *pdev, u32 guid, u64 *data, loff_t off, u32 count);
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| };
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| 
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| /**
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|  * struct intel_vsec_platform_info - Platform specific data
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|  * @parent:    parent device in the auxbus chain
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|  * @headers:   list of headers to define the PMT client devices to create
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|  * @priv_data: private data, usable by parent devices, currently a callback
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|  * @caps:      bitmask of PMT capabilities for the given headers
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|  * @quirks:    bitmask of VSEC device quirks
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|  * @base_addr: allow a base address to be specified (rather than derived)
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|  */
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| struct intel_vsec_platform_info {
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| 	struct device *parent;
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| 	struct intel_vsec_header **headers;
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| 	void *priv_data;
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| 	unsigned long caps;
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| 	unsigned long quirks;
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| 	u64 base_addr;
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| };
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| 
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| /**
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|  * struct intel_sec_device - Auxbus specific device information
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|  * @auxdev:        auxbus device struct for auxbus access
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|  * @pcidev:        pci device associated with the device
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|  * @resource:      any resources shared by the parent
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|  * @ida:           id reference
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|  * @num_resources: number of resources
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|  * @id:            xarray id
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|  * @priv_data:     any private data needed
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|  * @quirks:        specified quirks
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|  * @base_addr:     base address of entries (if specified)
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|  */
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| struct intel_vsec_device {
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| 	struct auxiliary_device auxdev;
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| 	struct pci_dev *pcidev;
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| 	struct resource *resource;
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| 	struct ida *ida;
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| 	int num_resources;
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| 	int id; /* xa */
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| 	void *priv_data;
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| 	size_t priv_data_size;
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| 	unsigned long quirks;
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| 	u64 base_addr;
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| };
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| 
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| int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent,
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| 		       struct intel_vsec_device *intel_vsec_dev,
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| 		       const char *name);
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| 
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| static inline struct intel_vsec_device *dev_to_ivdev(struct device *dev)
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| {
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| 	return container_of(dev, struct intel_vsec_device, auxdev.dev);
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| }
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| 
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| static inline struct intel_vsec_device *auxdev_to_ivdev(struct auxiliary_device *auxdev)
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| {
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| 	return container_of(auxdev, struct intel_vsec_device, auxdev);
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| }
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| 
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| #if IS_ENABLED(CONFIG_INTEL_VSEC)
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| void intel_vsec_register(struct pci_dev *pdev,
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| 			 struct intel_vsec_platform_info *info);
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| #else
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| static inline void intel_vsec_register(struct pci_dev *pdev,
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| 				       struct intel_vsec_platform_info *info)
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| {
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| }
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| #endif
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| #endif
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