forked from mirrors/linux
		
	Add hwspinlock support for the CSR atlas7 SoC. The Hardware Spinlock device on atlas7 provides hardware assistance for synchronization between the multiple processors in the system (dual Cortex-A7, CAN bus Cortex-M3 and audio DSP). Reviewed-by: Suman Anna <s-anna@ti.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Wei Chen <wei.chen@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
		
			
				
	
	
		
			136 lines
		
	
	
	
		
			3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			136 lines
		
	
	
	
		
			3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * SIRF hardware spinlock driver
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 *
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 * Copyright (c) 2015 Cambridge Silicon Radio Limited, a CSR plc group company.
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 *
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 * Licensed under GPLv2.
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 */
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/hwspinlock.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include "hwspinlock_internal.h"
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struct sirf_hwspinlock {
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	void __iomem *io_base;
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	struct hwspinlock_device bank;
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};
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/* Number of Hardware Spinlocks*/
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#define	HW_SPINLOCK_NUMBER	30
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/* Hardware spinlock register offsets */
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#define HW_SPINLOCK_BASE	0x404
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#define HW_SPINLOCK_OFFSET(x)	(HW_SPINLOCK_BASE + 0x4 * (x))
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static int sirf_hwspinlock_trylock(struct hwspinlock *lock)
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{
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	void __iomem *lock_addr = lock->priv;
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	/* attempt to acquire the lock by reading value == 1 from it */
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	return !!readl(lock_addr);
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}
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static void sirf_hwspinlock_unlock(struct hwspinlock *lock)
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{
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	void __iomem *lock_addr = lock->priv;
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	/* release the lock by writing 0 to it */
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	writel(0, lock_addr);
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}
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static const struct hwspinlock_ops sirf_hwspinlock_ops = {
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	.trylock = sirf_hwspinlock_trylock,
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	.unlock = sirf_hwspinlock_unlock,
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};
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static int sirf_hwspinlock_probe(struct platform_device *pdev)
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{
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	struct sirf_hwspinlock *hwspin;
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	struct hwspinlock *hwlock;
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	int idx, ret;
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	if (!pdev->dev.of_node)
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		return -ENODEV;
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	hwspin = devm_kzalloc(&pdev->dev, sizeof(*hwspin) +
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			sizeof(*hwlock) * HW_SPINLOCK_NUMBER, GFP_KERNEL);
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	if (!hwspin)
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		return -ENOMEM;
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	/* retrieve io base */
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	hwspin->io_base = of_iomap(pdev->dev.of_node, 0);
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	if (!hwspin->io_base)
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		return -ENOMEM;
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	for (idx = 0; idx < HW_SPINLOCK_NUMBER; idx++) {
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		hwlock = &hwspin->bank.lock[idx];
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		hwlock->priv = hwspin->io_base + HW_SPINLOCK_OFFSET(idx);
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	}
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	platform_set_drvdata(pdev, hwspin);
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	pm_runtime_enable(&pdev->dev);
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	ret = hwspin_lock_register(&hwspin->bank, &pdev->dev,
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				   &sirf_hwspinlock_ops, 0,
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				   HW_SPINLOCK_NUMBER);
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	if (ret)
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		goto reg_failed;
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	return 0;
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reg_failed:
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	pm_runtime_disable(&pdev->dev);
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	iounmap(hwspin->io_base);
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	return ret;
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}
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static int sirf_hwspinlock_remove(struct platform_device *pdev)
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{
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	struct sirf_hwspinlock *hwspin = platform_get_drvdata(pdev);
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	int ret;
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	ret = hwspin_lock_unregister(&hwspin->bank);
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	if (ret) {
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		dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
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		return ret;
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	}
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	pm_runtime_disable(&pdev->dev);
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	iounmap(hwspin->io_base);
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	return 0;
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}
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static const struct of_device_id sirf_hwpinlock_ids[] = {
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	{ .compatible = "sirf,hwspinlock", },
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	{},
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};
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MODULE_DEVICE_TABLE(of, sirf_hwpinlock_ids);
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static struct platform_driver sirf_hwspinlock_driver = {
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	.probe = sirf_hwspinlock_probe,
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	.remove = sirf_hwspinlock_remove,
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	.driver = {
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		.name = "atlas7_hwspinlock",
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		.of_match_table = of_match_ptr(sirf_hwpinlock_ids),
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	},
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};
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module_platform_driver(sirf_hwspinlock_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("SIRF Hardware spinlock driver");
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MODULE_AUTHOR("Wei Chen <wei.chen@csr.com>");
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