forked from mirrors/linux
		
	 d1f1570f3d
			
		
	
	
		d1f1570f3d
		
	
	
	
	
		
			
			Add interconnect-cells to clock provider so that it can be used as icc provider. Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip interfaces. This will be used by the gcc-ipq9574 driver that will for providing interconnect services using the icc-clk framework. Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20240430064214.2030013-3-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
		
			
				
	
	
		
			59 lines
		
	
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			59 lines
		
	
	
	
		
			1.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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| #ifndef INTERCONNECT_QCOM_IPQ9574_H
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| #define INTERCONNECT_QCOM_IPQ9574_H
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| 
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| #define MASTER_ANOC_PCIE0		0
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| #define SLAVE_ANOC_PCIE0		1
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| #define MASTER_SNOC_PCIE0		2
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| #define SLAVE_SNOC_PCIE0		3
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| #define MASTER_ANOC_PCIE1		4
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| #define SLAVE_ANOC_PCIE1		5
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| #define MASTER_SNOC_PCIE1		6
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| #define SLAVE_SNOC_PCIE1		7
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| #define MASTER_ANOC_PCIE2		8
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| #define SLAVE_ANOC_PCIE2		9
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| #define MASTER_SNOC_PCIE2		10
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| #define SLAVE_SNOC_PCIE2		11
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| #define MASTER_ANOC_PCIE3		12
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| #define SLAVE_ANOC_PCIE3		13
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| #define MASTER_SNOC_PCIE3		14
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| #define SLAVE_SNOC_PCIE3		15
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| #define MASTER_USB			16
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| #define SLAVE_USB			17
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| #define MASTER_USB_AXI			18
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| #define SLAVE_USB_AXI			19
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| #define MASTER_NSSNOC_NSSCC		20
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| #define SLAVE_NSSNOC_NSSCC		21
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| #define MASTER_NSSNOC_SNOC_0		22
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| #define SLAVE_NSSNOC_SNOC_0		23
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| #define MASTER_NSSNOC_SNOC_1		24
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| #define SLAVE_NSSNOC_SNOC_1		25
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| #define MASTER_NSSNOC_PCNOC_1		26
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| #define SLAVE_NSSNOC_PCNOC_1		27
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| #define MASTER_NSSNOC_QOSGEN_REF	28
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| #define SLAVE_NSSNOC_QOSGEN_REF		29
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| #define MASTER_NSSNOC_TIMEOUT_REF	30
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| #define SLAVE_NSSNOC_TIMEOUT_REF	31
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| #define MASTER_NSSNOC_XO_DCD		32
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| #define SLAVE_NSSNOC_XO_DCD		33
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| #define MASTER_NSSNOC_ATB		34
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| #define SLAVE_NSSNOC_ATB		35
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| #define MASTER_MEM_NOC_NSSNOC		36
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| #define SLAVE_MEM_NOC_NSSNOC		37
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| #define MASTER_NSSNOC_MEMNOC		38
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| #define SLAVE_NSSNOC_MEMNOC		39
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| #define MASTER_NSSNOC_MEM_NOC_1		40
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| #define SLAVE_NSSNOC_MEM_NOC_1		41
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| 
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| #define MASTER_NSSNOC_PPE		0
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| #define SLAVE_NSSNOC_PPE		1
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| #define MASTER_NSSNOC_PPE_CFG		2
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| #define SLAVE_NSSNOC_PPE_CFG		3
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| #define MASTER_NSSNOC_NSS_CSR		4
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| #define SLAVE_NSSNOC_NSS_CSR		5
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| #define MASTER_NSSNOC_IMEM_QSB		6
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| #define SLAVE_NSSNOC_IMEM_QSB		7
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| #define MASTER_NSSNOC_IMEM_AHB		8
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| #define SLAVE_NSSNOC_IMEM_AHB		9
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| 
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| #endif /* INTERCONNECT_QCOM_IPQ9574_H */
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