forked from mirrors/linux
487eec8da8
For Perf to be able to decode when per-sink trace IDs are used, emit the sink that's being written to for each ETM. Perf currently errors out if it sees a newer packet version so instead of bumping it, add a new minor version field. This can be used to signify new versions that have backwards compatible fields. Considering this change is only for high core count machines, it doesn't make sense to make a breaking change for everyone. Signed-off-by: James Clark <james.clark@arm.com> Tested-by: Leo Yan <leo.yan@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: James Clark <james.clark@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20240722101202.26915-17-james.clark@linaro.org
69 lines
2.3 KiB
C
69 lines
2.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright(C) 2015 Linaro Limited. All rights reserved.
|
|
* Author: Mathieu Poirier <mathieu.poirier@linaro.org>
|
|
*/
|
|
|
|
#ifndef _LINUX_CORESIGHT_PMU_H
|
|
#define _LINUX_CORESIGHT_PMU_H
|
|
|
|
#include <linux/bits.h>
|
|
|
|
#define CORESIGHT_ETM_PMU_NAME "cs_etm"
|
|
|
|
/*
|
|
* The legacy Trace ID system based on fixed calculation from the cpu
|
|
* number. This has been replaced by drivers using a dynamic allocation
|
|
* system - but need to retain the legacy algorithm for backward comparibility
|
|
* in certain situations:-
|
|
* a) new perf running on older systems that generate the legacy mapping
|
|
* b) older tools that may not update at the same time as the kernel.
|
|
*/
|
|
#define CORESIGHT_LEGACY_CPU_TRACE_ID(cpu) (0x10 + (cpu * 2))
|
|
|
|
/*
|
|
* Below are the definition of bit offsets for perf option, and works as
|
|
* arbitrary values for all ETM versions.
|
|
*
|
|
* Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,
|
|
* ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and
|
|
* directly use below macros as config bits.
|
|
*/
|
|
#define ETM_OPT_BRANCH_BROADCAST 8
|
|
#define ETM_OPT_CYCACC 12
|
|
#define ETM_OPT_CTXTID 14
|
|
#define ETM_OPT_CTXTID2 15
|
|
#define ETM_OPT_TS 28
|
|
#define ETM_OPT_RETSTK 29
|
|
|
|
/* ETMv4 CONFIGR programming bits for the ETM OPTs */
|
|
#define ETM4_CFG_BIT_BB 3
|
|
#define ETM4_CFG_BIT_CYCACC 4
|
|
#define ETM4_CFG_BIT_CTXTID 6
|
|
#define ETM4_CFG_BIT_VMID 7
|
|
#define ETM4_CFG_BIT_TS 11
|
|
#define ETM4_CFG_BIT_RETSTK 12
|
|
#define ETM4_CFG_BIT_VMID_OPT 15
|
|
|
|
/*
|
|
* Interpretation of the PERF_RECORD_AUX_OUTPUT_HW_ID payload.
|
|
* Used to associate a CPU with the CoreSight Trace ID.
|
|
* [07:00] - Trace ID - uses 8 bits to make value easy to read in file.
|
|
* [39:08] - Sink ID - as reported in /sys/bus/event_source/devices/cs_etm/sinks/
|
|
* Added in minor version 1.
|
|
* [55:40] - Unused (SBZ)
|
|
* [59:56] - Minor Version - previously existing fields are compatible with
|
|
* all minor versions.
|
|
* [63:60] - Major Version - previously existing fields mean different things
|
|
* in new major versions.
|
|
*/
|
|
#define CS_AUX_HW_ID_TRACE_ID_MASK GENMASK_ULL(7, 0)
|
|
#define CS_AUX_HW_ID_SINK_ID_MASK GENMASK_ULL(39, 8)
|
|
|
|
#define CS_AUX_HW_ID_MINOR_VERSION_MASK GENMASK_ULL(59, 56)
|
|
#define CS_AUX_HW_ID_MAJOR_VERSION_MASK GENMASK_ULL(63, 60)
|
|
|
|
#define CS_AUX_HW_ID_MAJOR_VERSION 0
|
|
#define CS_AUX_HW_ID_MINOR_VERSION 1
|
|
|
|
#endif
|