forked from mirrors/linux
375b535941
SDUC memory addressing spans beyond 2TB and up to 128TB. Therefore, 38 bits are required to access the entire memory space of all sectors. Those extra 6 bits are to be carried by CMD22 prior of sending read/write/erase commands: CMD17, CMD18, CMD24, CMD25, CMD32, and CMD33. CMD22 will carry the higher order 6 bits, and must precedes any of the above commands even if it targets sector < 2TB. No error related to address or length is indicated in CMD22 but rather in the read/write command itself. Tested-by: Ricky WU <ricky_wu@realtek.com> Reviewed-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Avri Altman <avri.altman@wdc.com> Link: https://lore.kernel.org/r/20241006051148.160278-3-avri.altman@wdc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
104 lines
2.9 KiB
C
104 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
|
|
/*
|
|
* include/linux/mmc/sd.h
|
|
*
|
|
* Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
|
|
*/
|
|
|
|
#ifndef LINUX_MMC_SD_H
|
|
#define LINUX_MMC_SD_H
|
|
|
|
/* SD commands type argument response */
|
|
/* class 0 */
|
|
/* This is basically the same command as for MMC with some quirks. */
|
|
#define SD_SEND_RELATIVE_ADDR 3 /* bcr R6 */
|
|
#define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */
|
|
#define SD_SWITCH_VOLTAGE 11 /* ac R1 */
|
|
|
|
/* Class 2 */
|
|
#define SD_ADDR_EXT 22 /* ac [5:0] R1 */
|
|
|
|
/* class 10 */
|
|
#define SD_SWITCH 6 /* adtc [31:0] See below R1 */
|
|
|
|
/* class 5 */
|
|
#define SD_ERASE_WR_BLK_START 32 /* ac [31:0] data addr R1 */
|
|
#define SD_ERASE_WR_BLK_END 33 /* ac [31:0] data addr R1 */
|
|
|
|
/* Application commands */
|
|
#define SD_APP_SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
|
|
#define SD_APP_SD_STATUS 13 /* adtc R1 */
|
|
#define SD_APP_SEND_NUM_WR_BLKS 22 /* adtc R1 */
|
|
#define SD_APP_OP_COND 41 /* bcr [31:0] OCR R3 */
|
|
#define SD_APP_SEND_SCR 51 /* adtc R1 */
|
|
|
|
/* class 11 */
|
|
#define SD_READ_EXTR_SINGLE 48 /* adtc [31:0] R1 */
|
|
#define SD_WRITE_EXTR_SINGLE 49 /* adtc [31:0] R1 */
|
|
|
|
/* OCR bit definitions */
|
|
#define SD_OCR_S18R (1 << 24) /* 1.8V switching request */
|
|
#define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */
|
|
#define SD_OCR_2T (1 << 27) /* HO2T/CO2T - SDUC support */
|
|
#define SD_OCR_XPC (1 << 28) /* SDXC power control */
|
|
#define SD_OCR_CCS (1 << 30) /* Card Capacity Status */
|
|
|
|
/*
|
|
* SD_SWITCH argument format:
|
|
*
|
|
* [31] Check (0) or switch (1)
|
|
* [30:24] Reserved (0)
|
|
* [23:20] Function group 6
|
|
* [19:16] Function group 5
|
|
* [15:12] Function group 4
|
|
* [11:8] Function group 3
|
|
* [7:4] Function group 2
|
|
* [3:0] Function group 1
|
|
*/
|
|
|
|
/*
|
|
* SD_SEND_IF_COND argument format:
|
|
*
|
|
* [31:12] Reserved (0)
|
|
* [11:8] Host Voltage Supply Flags
|
|
* [7:0] Check Pattern (0xAA)
|
|
*/
|
|
|
|
/*
|
|
* SCR field definitions
|
|
*/
|
|
|
|
#define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
|
|
#define SCR_SPEC_VER_1 1 /* Implements system specification 1.10 */
|
|
#define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */
|
|
|
|
/*
|
|
* SD bus widths
|
|
*/
|
|
#define SD_BUS_WIDTH_1 0
|
|
#define SD_BUS_WIDTH_4 2
|
|
|
|
/*
|
|
* SD_SWITCH mode
|
|
*/
|
|
#define SD_SWITCH_CHECK 0
|
|
#define SD_SWITCH_SET 1
|
|
|
|
/*
|
|
* SD_SWITCH function groups
|
|
*/
|
|
#define SD_SWITCH_GRP_ACCESS 0
|
|
|
|
/*
|
|
* SD_SWITCH access modes
|
|
*/
|
|
#define SD_SWITCH_ACCESS_DEF 0
|
|
#define SD_SWITCH_ACCESS_HS 1
|
|
|
|
/*
|
|
* Erase/discard
|
|
*/
|
|
#define SD_ERASE_ARG 0x00000000
|
|
#define SD_DISCARD_ARG 0x00000001
|
|
|
|
#endif /* LINUX_MMC_SD_H */
|