forked from mirrors/linux
4a83abcef5
This patch add a way to get and set the power limit of a PSE PI. For that it uses regulator API callbacks wrapper like get_voltage() and get/set_current_limit() as power is simply V * I. We used mW unit as defined by the IEEE 802.3-2022 standards. set_current_limit() uses the voltage return by get_voltage() and the desired power limit to calculate the current limit. get_voltage() callback is then mandatory to set the power limit. get_current_limit() callback is by default looking at a driver callback and fallback to extracting the current limit from _pse_ethtool_get_status() if the driver does not set its callback. We prefer let the user the choice because ethtool_get_status return much more information than the current limit. expand pse status with c33_pw_limit_ranges to return the ranges available to configure the power limit. Reviewed-by: Sai Krishna <saikrishnag@marvell.com> Acked-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Link: https://patch.msgid.link/20240704-feature_poe_power_cap-v6-4-320003204264@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
243 lines
7.8 KiB
C
243 lines
7.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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// Copyright (c) 2022 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
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*/
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#ifndef _LINUX_PSE_CONTROLLER_H
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#define _LINUX_PSE_CONTROLLER_H
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#include <linux/ethtool.h>
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#include <linux/list.h>
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#include <uapi/linux/ethtool.h>
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/* Maximum current in uA according to IEEE 802.3-2022 Table 145-1 */
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#define MAX_PI_CURRENT 1920000
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struct phy_device;
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struct pse_controller_dev;
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/**
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* struct pse_control_config - PSE control/channel configuration.
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*
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* @podl_admin_control: set PoDL PSE admin control as described in
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* IEEE 802.3-2018 30.15.1.2.1 acPoDLPSEAdminControl
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* @c33_admin_control: set PSE admin control as described in
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* IEEE 802.3-2022 30.9.1.2.1 acPSEAdminControl
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*/
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struct pse_control_config {
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enum ethtool_podl_pse_admin_state podl_admin_control;
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enum ethtool_c33_pse_admin_state c33_admin_control;
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};
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/**
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* struct pse_control_status - PSE control/channel status.
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*
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* @podl_admin_state: operational state of the PoDL PSE
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* functions. IEEE 802.3-2018 30.15.1.1.2 aPoDLPSEAdminState
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* @podl_pw_status: power detection status of the PoDL PSE.
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* IEEE 802.3-2018 30.15.1.1.3 aPoDLPSEPowerDetectionStatus:
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* @c33_admin_state: operational state of the PSE
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* functions. IEEE 802.3-2022 30.9.1.1.2 aPSEAdminState
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* @c33_pw_status: power detection status of the PSE.
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* IEEE 802.3-2022 30.9.1.1.5 aPSEPowerDetectionStatus:
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* @c33_pw_class: detected class of a powered PD
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* IEEE 802.3-2022 30.9.1.1.8 aPSEPowerClassification
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* @c33_actual_pw: power currently delivered by the PSE in mW
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* IEEE 802.3-2022 30.9.1.1.23 aPSEActualPower
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* @c33_ext_state_info: extended state information of the PSE
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* @c33_avail_pw_limit: available power limit of the PSE in mW
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* IEEE 802.3-2022 145.2.5.4 pse_avail_pwr
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* @c33_pw_limit_ranges: supported power limit configuration range. The driver
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* is in charge of the memory allocation.
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* @c33_pw_limit_nb_ranges: number of supported power limit configuration
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* ranges
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*/
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struct pse_control_status {
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enum ethtool_podl_pse_admin_state podl_admin_state;
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enum ethtool_podl_pse_pw_d_status podl_pw_status;
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enum ethtool_c33_pse_admin_state c33_admin_state;
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enum ethtool_c33_pse_pw_d_status c33_pw_status;
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u32 c33_pw_class;
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u32 c33_actual_pw;
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struct ethtool_c33_pse_ext_state_info c33_ext_state_info;
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u32 c33_avail_pw_limit;
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struct ethtool_c33_pse_pw_limit_range *c33_pw_limit_ranges;
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u32 c33_pw_limit_nb_ranges;
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};
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/**
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* struct pse_controller_ops - PSE controller driver callbacks
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*
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* @ethtool_get_status: get PSE control status for ethtool interface
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* @setup_pi_matrix: setup PI matrix of the PSE controller
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* @pi_is_enabled: Return 1 if the PSE PI is enabled, 0 if not.
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* May also return negative errno.
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* @pi_enable: Configure the PSE PI as enabled.
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* @pi_disable: Configure the PSE PI as disabled.
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* @pi_get_voltage: Return voltage similarly to get_voltage regulator
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* callback.
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* @pi_get_current_limit: Get the configured current limit similarly to
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* get_current_limit regulator callback.
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* @pi_set_current_limit: Configure the current limit similarly to
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* set_current_limit regulator callback.
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* Should not return an error in case of MAX_PI_CURRENT
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* current value set.
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*/
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struct pse_controller_ops {
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int (*ethtool_get_status)(struct pse_controller_dev *pcdev,
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unsigned long id, struct netlink_ext_ack *extack,
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struct pse_control_status *status);
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int (*setup_pi_matrix)(struct pse_controller_dev *pcdev);
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int (*pi_is_enabled)(struct pse_controller_dev *pcdev, int id);
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int (*pi_enable)(struct pse_controller_dev *pcdev, int id);
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int (*pi_disable)(struct pse_controller_dev *pcdev, int id);
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int (*pi_get_voltage)(struct pse_controller_dev *pcdev, int id);
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int (*pi_get_current_limit)(struct pse_controller_dev *pcdev,
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int id);
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int (*pi_set_current_limit)(struct pse_controller_dev *pcdev,
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int id, int max_uA);
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};
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struct module;
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struct device_node;
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struct of_phandle_args;
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struct pse_control;
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/* PSE PI pairset pinout can either be Alternative A or Alternative B */
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enum pse_pi_pairset_pinout {
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ALTERNATIVE_A,
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ALTERNATIVE_B,
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};
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/**
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* struct pse_pi_pairset - PSE PI pairset entity describing the pinout
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* alternative ant its phandle
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*
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* @pinout: description of the pinout alternative
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* @np: device node pointer describing the pairset phandle
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*/
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struct pse_pi_pairset {
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enum pse_pi_pairset_pinout pinout;
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struct device_node *np;
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};
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/**
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* struct pse_pi - PSE PI (Power Interface) entity as described in
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* IEEE 802.3-2022 145.2.4
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*
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* @pairset: table of the PSE PI pinout alternative for the two pairset
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* @np: device node pointer of the PSE PI node
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* @rdev: regulator represented by the PSE PI
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* @admin_state_enabled: PI enabled state
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*/
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struct pse_pi {
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struct pse_pi_pairset pairset[2];
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struct device_node *np;
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struct regulator_dev *rdev;
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bool admin_state_enabled;
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};
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/**
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* struct pse_controller_dev - PSE controller entity that might
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* provide multiple PSE controls
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* @ops: a pointer to device specific struct pse_controller_ops
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* @owner: kernel module of the PSE controller driver
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* @list: internal list of PSE controller devices
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* @pse_control_head: head of internal list of requested PSE controls
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* @dev: corresponding driver model device struct
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* @of_pse_n_cells: number of cells in PSE line specifiers
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* @nr_lines: number of PSE controls in this controller device
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* @lock: Mutex for serialization access to the PSE controller
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* @types: types of the PSE controller
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* @pi: table of PSE PIs described in this controller device
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* @no_of_pse_pi: flag set if the pse_pis devicetree node is not used
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*/
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struct pse_controller_dev {
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const struct pse_controller_ops *ops;
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struct module *owner;
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struct list_head list;
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struct list_head pse_control_head;
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struct device *dev;
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int of_pse_n_cells;
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unsigned int nr_lines;
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struct mutex lock;
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enum ethtool_pse_types types;
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struct pse_pi *pi;
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bool no_of_pse_pi;
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};
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#if IS_ENABLED(CONFIG_PSE_CONTROLLER)
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int pse_controller_register(struct pse_controller_dev *pcdev);
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void pse_controller_unregister(struct pse_controller_dev *pcdev);
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struct device;
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int devm_pse_controller_register(struct device *dev,
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struct pse_controller_dev *pcdev);
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struct pse_control *of_pse_control_get(struct device_node *node);
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void pse_control_put(struct pse_control *psec);
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int pse_ethtool_get_status(struct pse_control *psec,
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struct netlink_ext_ack *extack,
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struct pse_control_status *status);
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int pse_ethtool_set_config(struct pse_control *psec,
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struct netlink_ext_ack *extack,
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const struct pse_control_config *config);
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int pse_ethtool_set_pw_limit(struct pse_control *psec,
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struct netlink_ext_ack *extack,
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const unsigned int pw_limit);
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int pse_ethtool_get_pw_limit(struct pse_control *psec,
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struct netlink_ext_ack *extack);
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bool pse_has_podl(struct pse_control *psec);
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bool pse_has_c33(struct pse_control *psec);
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#else
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static inline struct pse_control *of_pse_control_get(struct device_node *node)
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{
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return ERR_PTR(-ENOENT);
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}
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static inline void pse_control_put(struct pse_control *psec)
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{
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}
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static inline int pse_ethtool_get_status(struct pse_control *psec,
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struct netlink_ext_ack *extack,
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struct pse_control_status *status)
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{
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return -EOPNOTSUPP;
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}
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static inline int pse_ethtool_set_config(struct pse_control *psec,
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struct netlink_ext_ack *extack,
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const struct pse_control_config *config)
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{
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return -EOPNOTSUPP;
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}
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static inline int pse_ethtool_set_pw_limit(struct pse_control *psec,
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struct netlink_ext_ack *extack,
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const unsigned int pw_limit)
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{
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return -EOPNOTSUPP;
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}
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static inline int pse_ethtool_get_pw_limit(struct pse_control *psec,
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struct netlink_ext_ack *extack)
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{
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return -EOPNOTSUPP;
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}
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static inline bool pse_has_podl(struct pse_control *psec)
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{
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return false;
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}
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static inline bool pse_has_c33(struct pse_control *psec)
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{
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return false;
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}
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#endif
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#endif
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