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	 f57aec443c
			
		
	
	
		f57aec443c
		
	
	
	
	
		
			
			A loop of the form:
    while true; do modprobe cxl_pci; modprobe -r cxl_pci; done
...fails with the following crash signature:
    BUG: kernel NULL pointer dereference, address: 0000000000000040
    [..]
    RIP: 0010:cxl_internal_send_cmd+0x5/0xb0 [cxl_core]
    [..]
    Call Trace:
     <TASK>
     cxl_pmem_ctl+0x121/0x240 [cxl_pmem]
     nvdimm_get_config_data+0xd6/0x1a0 [libnvdimm]
     nd_label_data_init+0x135/0x7e0 [libnvdimm]
     nvdimm_probe+0xd6/0x1c0 [libnvdimm]
     nvdimm_bus_probe+0x7a/0x1e0 [libnvdimm]
     really_probe+0xde/0x380
     __driver_probe_device+0x78/0x170
     driver_probe_device+0x1f/0x90
     __device_attach_driver+0x85/0x110
     bus_for_each_drv+0x7d/0xc0
     __device_attach+0xb4/0x1e0
     bus_probe_device+0x9f/0xc0
     device_add+0x445/0x9c0
     nd_async_device_register+0xe/0x40 [libnvdimm]
     async_run_entry_fn+0x30/0x130
...namely that the bottom half of async nvdimm device registration runs
after the CXL has already torn down the context that cxl_pmem_ctl()
needs. Unlike the ACPI NFIT case that benefits from launching multiple
nvdimm device registrations in parallel from those listed in the table,
CXL is already marked PROBE_PREFER_ASYNCHRONOUS. So provide for a
synchronous registration path to preclude this scenario.
Fixes: 21083f5152 ("cxl/pmem: Register 'pmem' / cxl_nvdimm devices")
Cc: <stable@vger.kernel.org>
Reported-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
		
	
			
		
			
				
	
	
		
			326 lines
		
	
	
	
		
			9.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			326 lines
		
	
	
	
		
			9.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * libnvdimm - Non-volatile-memory Devices Subsystem
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|  *
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|  * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
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|  */
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| #ifndef __LIBNVDIMM_H__
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| #define __LIBNVDIMM_H__
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| #include <linux/kernel.h>
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| #include <linux/sizes.h>
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| #include <linux/types.h>
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| #include <linux/uuid.h>
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| #include <linux/spinlock.h>
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| #include <linux/bio.h>
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| 
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| struct badrange_entry {
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| 	u64 start;
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| 	u64 length;
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| 	struct list_head list;
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| };
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| 
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| struct badrange {
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| 	struct list_head list;
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| 	spinlock_t lock;
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| };
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| 
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| enum {
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| 	/* unarmed memory devices may not persist writes */
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| 	NDD_UNARMED = 1,
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| 	/* locked memory devices should not be accessed */
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| 	NDD_LOCKED = 2,
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| 	/* memory under security wipes should not be accessed */
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| 	NDD_SECURITY_OVERWRITE = 3,
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| 	/*  tracking whether or not there is a pending device reference */
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| 	NDD_WORK_PENDING = 4,
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| 	/* dimm supports namespace labels */
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| 	NDD_LABELING = 6,
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| 	/*
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| 	 * dimm contents have changed requiring invalidation of CPU caches prior
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| 	 * to activation of a region that includes this device
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| 	 */
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| 	NDD_INCOHERENT = 7,
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| 
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| 	/* dimm provider wants synchronous registration by __nvdimm_create() */
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| 	NDD_REGISTER_SYNC = 8,
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| 
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| 	/* need to set a limit somewhere, but yes, this is likely overkill */
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| 	ND_IOCTL_MAX_BUFLEN = SZ_4M,
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| 	ND_CMD_MAX_ELEM = 5,
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| 	ND_CMD_MAX_ENVELOPE = 256,
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| 	ND_MAX_MAPPINGS = 32,
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| 
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| 	/* region flag indicating to direct-map persistent memory by default */
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| 	ND_REGION_PAGEMAP = 0,
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| 	/*
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| 	 * Platform ensures entire CPU store data path is flushed to pmem on
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| 	 * system power loss.
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| 	 */
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| 	ND_REGION_PERSIST_CACHE = 1,
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| 	/*
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| 	 * Platform provides mechanisms to automatically flush outstanding
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| 	 * write data from memory controler to pmem on system power loss.
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| 	 * (ADR)
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| 	 */
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| 	ND_REGION_PERSIST_MEMCTRL = 2,
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| 
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| 	/* Platform provides asynchronous flush mechanism */
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| 	ND_REGION_ASYNC = 3,
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| 
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| 	/* Region was created by CXL subsystem */
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| 	ND_REGION_CXL = 4,
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| 
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| 	/* mark newly adjusted resources as requiring a label update */
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| 	DPA_RESOURCE_ADJUSTED = 1 << 0,
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| };
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| 
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| struct nvdimm;
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| struct nvdimm_bus_descriptor;
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| typedef int (*ndctl_fn)(struct nvdimm_bus_descriptor *nd_desc,
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| 		struct nvdimm *nvdimm, unsigned int cmd, void *buf,
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| 		unsigned int buf_len, int *cmd_rc);
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| 
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| struct device_node;
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| struct nvdimm_bus_descriptor {
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| 	const struct attribute_group **attr_groups;
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| 	unsigned long cmd_mask;
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| 	unsigned long dimm_family_mask;
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| 	unsigned long bus_family_mask;
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| 	struct module *module;
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| 	char *provider_name;
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| 	struct device_node *of_node;
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| 	ndctl_fn ndctl;
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| 	int (*flush_probe)(struct nvdimm_bus_descriptor *nd_desc);
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| 	int (*clear_to_send)(struct nvdimm_bus_descriptor *nd_desc,
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| 			struct nvdimm *nvdimm, unsigned int cmd, void *data);
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| 	const struct nvdimm_bus_fw_ops *fw_ops;
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| };
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| 
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| struct nd_cmd_desc {
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| 	int in_num;
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| 	int out_num;
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| 	u32 in_sizes[ND_CMD_MAX_ELEM];
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| 	int out_sizes[ND_CMD_MAX_ELEM];
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| };
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| 
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| struct nd_interleave_set {
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| 	/* v1.1 definition of the interleave-set-cookie algorithm */
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| 	u64 cookie1;
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| 	/* v1.2 definition of the interleave-set-cookie algorithm */
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| 	u64 cookie2;
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| 	/* compatibility with initial buggy Linux implementation */
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| 	u64 altcookie;
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| 
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| 	guid_t type_guid;
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| };
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| 
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| struct nd_mapping_desc {
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| 	struct nvdimm *nvdimm;
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| 	u64 start;
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| 	u64 size;
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| 	int position;
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| };
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| 
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| struct nd_region;
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| struct nd_region_desc {
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| 	struct resource *res;
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| 	struct nd_mapping_desc *mapping;
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| 	u16 num_mappings;
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| 	const struct attribute_group **attr_groups;
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| 	struct nd_interleave_set *nd_set;
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| 	void *provider_data;
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| 	int num_lanes;
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| 	int numa_node;
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| 	int target_node;
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| 	unsigned long flags;
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| 	int memregion;
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| 	struct device_node *of_node;
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| 	int (*flush)(struct nd_region *nd_region, struct bio *bio);
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| };
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| 
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| struct device;
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| void *devm_nvdimm_memremap(struct device *dev, resource_size_t offset,
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| 		size_t size, unsigned long flags);
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| static inline void __iomem *devm_nvdimm_ioremap(struct device *dev,
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| 		resource_size_t offset, size_t size)
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| {
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| 	return (void __iomem *) devm_nvdimm_memremap(dev, offset, size, 0);
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| }
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| 
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| struct nvdimm_bus;
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| 
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| /*
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|  * Note that separate bits for locked + unlocked are defined so that
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|  * 'flags == 0' corresponds to an error / not-supported state.
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|  */
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| enum nvdimm_security_bits {
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| 	NVDIMM_SECURITY_DISABLED,
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| 	NVDIMM_SECURITY_UNLOCKED,
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| 	NVDIMM_SECURITY_LOCKED,
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| 	NVDIMM_SECURITY_FROZEN,
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| 	NVDIMM_SECURITY_OVERWRITE,
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| };
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| 
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| #define NVDIMM_PASSPHRASE_LEN		32
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| #define NVDIMM_KEY_DESC_LEN		22
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| 
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| struct nvdimm_key_data {
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| 	u8 data[NVDIMM_PASSPHRASE_LEN];
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| };
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| 
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| enum nvdimm_passphrase_type {
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| 	NVDIMM_USER,
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| 	NVDIMM_MASTER,
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| };
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| 
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| struct nvdimm_security_ops {
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| 	unsigned long (*get_flags)(struct nvdimm *nvdimm,
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| 			enum nvdimm_passphrase_type pass_type);
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| 	int (*freeze)(struct nvdimm *nvdimm);
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| 	int (*change_key)(struct nvdimm *nvdimm,
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| 			const struct nvdimm_key_data *old_data,
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| 			const struct nvdimm_key_data *new_data,
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| 			enum nvdimm_passphrase_type pass_type);
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| 	int (*unlock)(struct nvdimm *nvdimm,
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| 			const struct nvdimm_key_data *key_data);
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| 	int (*disable)(struct nvdimm *nvdimm,
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| 			const struct nvdimm_key_data *key_data);
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| 	int (*erase)(struct nvdimm *nvdimm,
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| 			const struct nvdimm_key_data *key_data,
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| 			enum nvdimm_passphrase_type pass_type);
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| 	int (*overwrite)(struct nvdimm *nvdimm,
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| 			const struct nvdimm_key_data *key_data);
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| 	int (*query_overwrite)(struct nvdimm *nvdimm);
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| 	int (*disable_master)(struct nvdimm *nvdimm,
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| 			      const struct nvdimm_key_data *key_data);
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| };
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| 
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| enum nvdimm_fwa_state {
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| 	NVDIMM_FWA_INVALID,
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| 	NVDIMM_FWA_IDLE,
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| 	NVDIMM_FWA_ARMED,
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| 	NVDIMM_FWA_BUSY,
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| 	NVDIMM_FWA_ARM_OVERFLOW,
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| };
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| 
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| enum nvdimm_fwa_trigger {
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| 	NVDIMM_FWA_ARM,
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| 	NVDIMM_FWA_DISARM,
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| };
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| 
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| enum nvdimm_fwa_capability {
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| 	NVDIMM_FWA_CAP_INVALID,
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| 	NVDIMM_FWA_CAP_NONE,
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| 	NVDIMM_FWA_CAP_QUIESCE,
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| 	NVDIMM_FWA_CAP_LIVE,
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| };
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| 
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| enum nvdimm_fwa_result {
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| 	NVDIMM_FWA_RESULT_INVALID,
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| 	NVDIMM_FWA_RESULT_NONE,
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| 	NVDIMM_FWA_RESULT_SUCCESS,
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| 	NVDIMM_FWA_RESULT_NOTSTAGED,
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| 	NVDIMM_FWA_RESULT_NEEDRESET,
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| 	NVDIMM_FWA_RESULT_FAIL,
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| };
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| 
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| struct nvdimm_bus_fw_ops {
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| 	enum nvdimm_fwa_state (*activate_state)
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| 		(struct nvdimm_bus_descriptor *nd_desc);
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| 	enum nvdimm_fwa_capability (*capability)
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| 		(struct nvdimm_bus_descriptor *nd_desc);
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| 	int (*activate)(struct nvdimm_bus_descriptor *nd_desc);
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| };
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| 
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| struct nvdimm_fw_ops {
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| 	enum nvdimm_fwa_state (*activate_state)(struct nvdimm *nvdimm);
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| 	enum nvdimm_fwa_result (*activate_result)(struct nvdimm *nvdimm);
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| 	int (*arm)(struct nvdimm *nvdimm, enum nvdimm_fwa_trigger arg);
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| };
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| 
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| void badrange_init(struct badrange *badrange);
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| int badrange_add(struct badrange *badrange, u64 addr, u64 length);
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| void badrange_forget(struct badrange *badrange, phys_addr_t start,
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| 		unsigned int len);
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| int nvdimm_bus_add_badrange(struct nvdimm_bus *nvdimm_bus, u64 addr,
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| 		u64 length);
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| struct nvdimm_bus *nvdimm_bus_register(struct device *parent,
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| 		struct nvdimm_bus_descriptor *nfit_desc);
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| void nvdimm_bus_unregister(struct nvdimm_bus *nvdimm_bus);
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| struct nvdimm_bus *to_nvdimm_bus(struct device *dev);
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| struct nvdimm_bus *nvdimm_to_bus(struct nvdimm *nvdimm);
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| struct nvdimm *to_nvdimm(struct device *dev);
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| struct nd_region *to_nd_region(struct device *dev);
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| struct device *nd_region_dev(struct nd_region *nd_region);
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| struct nvdimm_bus_descriptor *to_nd_desc(struct nvdimm_bus *nvdimm_bus);
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| struct device *to_nvdimm_bus_dev(struct nvdimm_bus *nvdimm_bus);
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| const char *nvdimm_name(struct nvdimm *nvdimm);
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| struct kobject *nvdimm_kobj(struct nvdimm *nvdimm);
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| unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm);
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| void *nvdimm_provider_data(struct nvdimm *nvdimm);
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| struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus,
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| 		void *provider_data, const struct attribute_group **groups,
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| 		unsigned long flags, unsigned long cmd_mask, int num_flush,
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| 		struct resource *flush_wpq, const char *dimm_id,
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| 		const struct nvdimm_security_ops *sec_ops,
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| 		const struct nvdimm_fw_ops *fw_ops);
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| static inline struct nvdimm *nvdimm_create(struct nvdimm_bus *nvdimm_bus,
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| 		void *provider_data, const struct attribute_group **groups,
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| 		unsigned long flags, unsigned long cmd_mask, int num_flush,
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| 		struct resource *flush_wpq)
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| {
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| 	return __nvdimm_create(nvdimm_bus, provider_data, groups, flags,
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| 			cmd_mask, num_flush, flush_wpq, NULL, NULL, NULL);
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| }
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| void nvdimm_delete(struct nvdimm *nvdimm);
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| void nvdimm_region_delete(struct nd_region *nd_region);
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| 
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| const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd);
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| const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd);
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| u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd,
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| 		const struct nd_cmd_desc *desc, int idx, void *buf);
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| u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd,
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| 		const struct nd_cmd_desc *desc, int idx, const u32 *in_field,
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| 		const u32 *out_field, unsigned long remainder);
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| int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count);
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| struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
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| 		struct nd_region_desc *ndr_desc);
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| struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
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| 		struct nd_region_desc *ndr_desc);
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| struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
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| 		struct nd_region_desc *ndr_desc);
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| void *nd_region_provider_data(struct nd_region *nd_region);
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| unsigned int nd_region_acquire_lane(struct nd_region *nd_region);
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| void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane);
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| u64 nd_fletcher64(void *addr, size_t len, bool le);
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| int nvdimm_flush(struct nd_region *nd_region, struct bio *bio);
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| int generic_nvdimm_flush(struct nd_region *nd_region);
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| int nvdimm_has_flush(struct nd_region *nd_region);
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| int nvdimm_has_cache(struct nd_region *nd_region);
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| int nvdimm_in_overwrite(struct nvdimm *nvdimm);
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| bool is_nvdimm_sync(struct nd_region *nd_region);
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| 
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| static inline int nvdimm_ctl(struct nvdimm *nvdimm, unsigned int cmd, void *buf,
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| 		unsigned int buf_len, int *cmd_rc)
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| {
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| 	struct nvdimm_bus *nvdimm_bus = nvdimm_to_bus(nvdimm);
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| 	struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
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| 
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| 	return nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len, cmd_rc);
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| }
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| 
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| #ifdef CONFIG_ARCH_HAS_PMEM_API
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| #define ARCH_MEMREMAP_PMEM MEMREMAP_WB
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| void arch_wb_cache_pmem(void *addr, size_t size);
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| void arch_invalidate_pmem(void *addr, size_t size);
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| #else
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| #define ARCH_MEMREMAP_PMEM MEMREMAP_WT
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| static inline void arch_wb_cache_pmem(void *addr, size_t size)
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| {
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| }
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| static inline void arch_invalidate_pmem(void *addr, size_t size)
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| {
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| }
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| #endif
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| 
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| #endif /* __LIBNVDIMM_H__ */
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