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		f36d6362c6
		
	
	
	
	
		
			
			For !ACPI builds, the acpi_device_id table will not be referenced because of ACPI_PTR: rtc-fsl-ftm-alarm.c:312:36: error: unused variable 'ftm_imx_acpi_ids' [-Werror,-Wunused-const-variable] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250222114146.162835-1-krzysztof.kozlowski@linaro.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
		
			
				
	
	
		
			331 lines
		
	
	
	
		
			8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			331 lines
		
	
	
	
		
			8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Freescale FlexTimer Module (FTM) alarm device driver.
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|  *
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|  * Copyright 2014 Freescale Semiconductor, Inc.
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|  * Copyright 2019-2020 NXP
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|  *
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|  */
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| 
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| #include <linux/device.h>
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| #include <linux/err.h>
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| #include <linux/interrupt.h>
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| #include <linux/io.h>
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| #include <linux/platform_device.h>
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| #include <linux/mod_devicetable.h>
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| #include <linux/module.h>
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| #include <linux/fsl/ftm.h>
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| #include <linux/rtc.h>
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| #include <linux/time.h>
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| #include <linux/acpi.h>
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| #include <linux/pm_wakeirq.h>
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| 
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| #define FTM_SC_CLK(c)		((c) << FTM_SC_CLK_MASK_SHIFT)
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| 
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| /*
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|  * Select Fixed frequency clock (32KHz) as clock source
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|  * of FlexTimer Module
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|  */
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| #define FTM_SC_CLKS_FIXED_FREQ	0x02
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| #define FIXED_FREQ_CLK		32000
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| 
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| /* Select 128 (2^7) as divider factor */
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| #define MAX_FREQ_DIV		(1 << FTM_SC_PS_MASK)
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| 
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| /* Maximum counter value in FlexTimer's CNT registers */
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| #define MAX_COUNT_VAL		0xffff
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| 
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| struct ftm_rtc {
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| 	struct rtc_device *rtc_dev;
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| 	void __iomem *base;
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| 	bool big_endian;
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| 	u32 alarm_freq;
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| };
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| 
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| static inline u32 rtc_readl(struct ftm_rtc *dev, u32 reg)
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| {
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| 	if (dev->big_endian)
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| 		return ioread32be(dev->base + reg);
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| 	else
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| 		return ioread32(dev->base + reg);
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| }
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| 
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| static inline void rtc_writel(struct ftm_rtc *dev, u32 reg, u32 val)
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| {
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| 	if (dev->big_endian)
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| 		iowrite32be(val, dev->base + reg);
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| 	else
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| 		iowrite32(val, dev->base + reg);
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| }
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| 
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| static inline void ftm_counter_enable(struct ftm_rtc *rtc)
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| {
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| 	u32 val;
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| 
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| 	/* select and enable counter clock source */
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| 	val = rtc_readl(rtc, FTM_SC);
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| 	val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
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| 	val |= (FTM_SC_PS_MASK | FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ));
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| 	rtc_writel(rtc, FTM_SC, val);
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| }
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| 
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| static inline void ftm_counter_disable(struct ftm_rtc *rtc)
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| {
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| 	u32 val;
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| 
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| 	/* disable counter clock source */
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| 	val = rtc_readl(rtc, FTM_SC);
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| 	val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
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| 	rtc_writel(rtc, FTM_SC, val);
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| }
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| 
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| static inline void ftm_irq_acknowledge(struct ftm_rtc *rtc)
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| {
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| 	unsigned int timeout = 100;
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| 
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| 	/*
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| 	 *Fix errata A-007728 for flextimer
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| 	 *	If the FTM counter reaches the FTM_MOD value between
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| 	 *	the reading of the TOF bit and the writing of 0 to
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| 	 *	the TOF bit, the process of clearing the TOF bit
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| 	 *	does not work as expected when FTMx_CONF[NUMTOF] != 0
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| 	 *	and the current TOF count is less than FTMx_CONF[NUMTOF].
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| 	 *	If the above condition is met, the TOF bit remains set.
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| 	 *	If the TOF interrupt is enabled (FTMx_SC[TOIE] = 1),the
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| 	 *	TOF interrupt also remains asserted.
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| 	 *
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| 	 *	Above is the errata discription
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| 	 *
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| 	 *	In one word: software clearing TOF bit not works when
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| 	 *	FTMx_CONF[NUMTOF] was seted as nonzero and FTM counter
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| 	 *	reaches the FTM_MOD value.
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| 	 *
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| 	 *	The workaround is clearing TOF bit until it works
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| 	 *	(FTM counter doesn't always reache the FTM_MOD anyway),
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| 	 *	which may cost some cycles.
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| 	 */
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| 	while ((FTM_SC_TOF & rtc_readl(rtc, FTM_SC)) && timeout--)
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| 		rtc_writel(rtc, FTM_SC, rtc_readl(rtc, FTM_SC) & (~FTM_SC_TOF));
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| }
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| 
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| static inline void ftm_irq_enable(struct ftm_rtc *rtc)
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| {
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| 	u32 val;
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| 
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| 	val = rtc_readl(rtc, FTM_SC);
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| 	val |= FTM_SC_TOIE;
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| 	rtc_writel(rtc, FTM_SC, val);
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| }
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| 
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| static inline void ftm_irq_disable(struct ftm_rtc *rtc)
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| {
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| 	u32 val;
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| 
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| 	val = rtc_readl(rtc, FTM_SC);
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| 	val &= ~FTM_SC_TOIE;
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| 	rtc_writel(rtc, FTM_SC, val);
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| }
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| 
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| static inline void ftm_reset_counter(struct ftm_rtc *rtc)
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| {
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| 	/*
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| 	 * The CNT register contains the FTM counter value.
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| 	 * Reset clears the CNT register. Writing any value to COUNT
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| 	 * updates the counter with its initial value, CNTIN.
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| 	 */
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| 	rtc_writel(rtc, FTM_CNT, 0x00);
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| }
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| 
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| static void ftm_clean_alarm(struct ftm_rtc *rtc)
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| {
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| 	ftm_counter_disable(rtc);
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| 
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| 	rtc_writel(rtc, FTM_CNTIN, 0x00);
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| 	rtc_writel(rtc, FTM_MOD, ~0U);
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| 
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| 	ftm_reset_counter(rtc);
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| }
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| 
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| static irqreturn_t ftm_rtc_alarm_interrupt(int irq, void *dev)
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| {
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| 	struct ftm_rtc *rtc = dev;
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| 
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| 	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
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| 
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| 	ftm_irq_acknowledge(rtc);
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| 	ftm_irq_disable(rtc);
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| 	ftm_clean_alarm(rtc);
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| 
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| 	return IRQ_HANDLED;
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| }
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| 
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| static int ftm_rtc_alarm_irq_enable(struct device *dev,
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| 		unsigned int enabled)
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| {
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| 	struct ftm_rtc *rtc = dev_get_drvdata(dev);
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| 
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| 	if (enabled)
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| 		ftm_irq_enable(rtc);
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| 	else
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| 		ftm_irq_disable(rtc);
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * Note:
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|  *	The function is not really getting time from the RTC
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|  *	since FlexTimer is not a RTC device, but we need to
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|  *	get time to setup alarm, so we are using system time
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|  *	for now.
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|  */
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| static int ftm_rtc_read_time(struct device *dev, struct rtc_time *tm)
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| {
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| 	rtc_time64_to_tm(ktime_get_real_seconds(), tm);
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| 
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| 	return 0;
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| }
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| 
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| static int ftm_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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| {
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| 	return 0;
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| }
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| 
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| /*
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|  * 1. Select fixed frequency clock (32KHz) as clock source;
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|  * 2. Select 128 (2^7) as divider factor;
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|  * So clock is 250 Hz (32KHz/128).
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|  *
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|  * 3. FlexTimer's CNT register is a 32bit register,
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|  * but the register's 16 bit as counter value,it's other 16 bit
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|  * is reserved.So minimum counter value is 0x0,maximum counter
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|  * value is 0xffff.
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|  * So max alarm value is 262 (65536 / 250) seconds
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|  */
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| static int ftm_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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| {
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| 	time64_t alm_time;
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| 	unsigned long long cycle;
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| 	struct ftm_rtc *rtc = dev_get_drvdata(dev);
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| 
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| 	alm_time = rtc_tm_to_time64(&alm->time);
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| 
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| 	ftm_clean_alarm(rtc);
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| 	cycle = (alm_time - ktime_get_real_seconds()) * rtc->alarm_freq;
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| 	if (cycle > MAX_COUNT_VAL) {
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| 		pr_err("Out of alarm range {0~262} seconds.\n");
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| 		return -ERANGE;
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| 	}
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| 
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| 	ftm_irq_disable(rtc);
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| 
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| 	/*
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| 	 * The counter increments until the value of MOD is reached,
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| 	 * at which point the counter is reloaded with the value of CNTIN.
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| 	 * The TOF (the overflow flag) bit is set when the FTM counter
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| 	 * changes from MOD to CNTIN. So we should using the cycle - 1.
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| 	 */
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| 	rtc_writel(rtc, FTM_MOD, cycle - 1);
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| 
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| 	ftm_counter_enable(rtc);
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| 	ftm_irq_enable(rtc);
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| 
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| 	return 0;
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| 
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| }
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| 
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| static const struct rtc_class_ops ftm_rtc_ops = {
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| 	.read_time		= ftm_rtc_read_time,
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| 	.read_alarm		= ftm_rtc_read_alarm,
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| 	.set_alarm		= ftm_rtc_set_alarm,
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| 	.alarm_irq_enable	= ftm_rtc_alarm_irq_enable,
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| };
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| 
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| static int ftm_rtc_probe(struct platform_device *pdev)
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| {
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| 	int irq;
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| 	int ret;
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| 	struct ftm_rtc *rtc;
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| 
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| 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
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| 	if (unlikely(!rtc)) {
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| 		dev_err(&pdev->dev, "cannot alloc memory for rtc\n");
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| 		return -ENOMEM;
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| 	}
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| 
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| 	platform_set_drvdata(pdev, rtc);
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| 
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| 	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
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| 	if (IS_ERR(rtc->rtc_dev))
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| 		return PTR_ERR(rtc->rtc_dev);
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| 
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| 	rtc->base = devm_platform_ioremap_resource(pdev, 0);
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| 	if (IS_ERR(rtc->base)) {
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| 		dev_err(&pdev->dev, "cannot ioremap resource for rtc\n");
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| 		return PTR_ERR(rtc->base);
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| 	}
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| 
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| 	irq = platform_get_irq(pdev, 0);
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| 	if (irq < 0)
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| 		return irq;
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| 
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| 	ret = devm_request_irq(&pdev->dev, irq, ftm_rtc_alarm_interrupt,
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| 			       0, dev_name(&pdev->dev), rtc);
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| 	if (ret < 0) {
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| 		dev_err(&pdev->dev, "failed to request irq\n");
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| 		return ret;
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| 	}
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| 
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| 	rtc->big_endian =
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| 		device_property_read_bool(&pdev->dev, "big-endian");
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| 
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| 	rtc->alarm_freq = (u32)FIXED_FREQ_CLK / (u32)MAX_FREQ_DIV;
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| 	rtc->rtc_dev->ops = &ftm_rtc_ops;
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| 
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| 	device_init_wakeup(&pdev->dev, true);
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| 	ret = dev_pm_set_wake_irq(&pdev->dev, irq);
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| 	if (ret)
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| 		dev_err(&pdev->dev, "failed to enable irq wake\n");
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| 
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| 	ret = devm_rtc_register_device(rtc->rtc_dev);
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| 	if (ret) {
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| 		dev_err(&pdev->dev, "can't register rtc device\n");
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| 		return ret;
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static const struct of_device_id ftm_rtc_match[] = {
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| 	{ .compatible = "fsl,ls1012a-ftm-alarm", },
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| 	{ .compatible = "fsl,ls1021a-ftm-alarm", },
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| 	{ .compatible = "fsl,ls1028a-ftm-alarm", },
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| 	{ .compatible = "fsl,ls1043a-ftm-alarm", },
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| 	{ .compatible = "fsl,ls1046a-ftm-alarm", },
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| 	{ .compatible = "fsl,ls1088a-ftm-alarm", },
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| 	{ .compatible = "fsl,ls208xa-ftm-alarm", },
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| 	{ .compatible = "fsl,lx2160a-ftm-alarm", },
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| 	{ },
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| };
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| MODULE_DEVICE_TABLE(of, ftm_rtc_match);
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| 
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| static const struct acpi_device_id ftm_imx_acpi_ids[] __maybe_unused = {
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| 	{"NXP0014",},
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| 	{ }
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| };
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| MODULE_DEVICE_TABLE(acpi, ftm_imx_acpi_ids);
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| 
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| static struct platform_driver ftm_rtc_driver = {
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| 	.probe		= ftm_rtc_probe,
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| 	.driver		= {
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| 		.name	= "ftm-alarm",
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| 		.of_match_table = ftm_rtc_match,
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| 		.acpi_match_table = ACPI_PTR(ftm_imx_acpi_ids),
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| 	},
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| };
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| 
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| module_platform_driver(ftm_rtc_driver);
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| 
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| MODULE_DESCRIPTION("NXP/Freescale FlexTimer alarm driver");
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| MODULE_AUTHOR("Biwen Li <biwen.li@nxp.com>");
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| MODULE_LICENSE("GPL");
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