forked from mirrors/linux
		
	Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation version 2 of the license this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 100 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.918357685@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			187 lines
		
	
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			187 lines
		
	
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0-only
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/*
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 * Copyright (C) 2016 BayLibre SAS.
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 * Author: Neil Armstrong <narmstrong@baylibre.com>
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 * Synchronised with arm_mhu.c from :
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 * Copyright (C) 2013-2015 Fujitsu Semiconductor Ltd.
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 * Copyright (C) 2015 Linaro Ltd.
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 * Author: Jassi Brar <jaswinder.singh@linaro.org>
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 */
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/mutex.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/mailbox_controller.h>
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#define INTR_SET_OFS	0x0
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#define INTR_STAT_OFS	0x4
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#define INTR_CLR_OFS	0x8
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#define MHU_SEC_OFFSET	0x0
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#define MHU_LP_OFFSET	0xc
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#define MHU_HP_OFFSET	0x18
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#define TX_REG_OFFSET	0x24
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#define MHU_CHANS	3
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struct platform_mhu_link {
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	int irq;
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	void __iomem *tx_reg;
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	void __iomem *rx_reg;
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};
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struct platform_mhu {
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	void __iomem *base;
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	struct platform_mhu_link mlink[MHU_CHANS];
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	struct mbox_chan chan[MHU_CHANS];
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	struct mbox_controller mbox;
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};
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static irqreturn_t platform_mhu_rx_interrupt(int irq, void *p)
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{
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	struct mbox_chan *chan = p;
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	struct platform_mhu_link *mlink = chan->con_priv;
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	u32 val;
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	val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS);
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	if (!val)
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		return IRQ_NONE;
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	mbox_chan_received_data(chan, (void *)&val);
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	writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS);
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	return IRQ_HANDLED;
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}
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static bool platform_mhu_last_tx_done(struct mbox_chan *chan)
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{
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	struct platform_mhu_link *mlink = chan->con_priv;
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	u32 val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
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	return (val == 0);
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}
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static int platform_mhu_send_data(struct mbox_chan *chan, void *data)
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{
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	struct platform_mhu_link *mlink = chan->con_priv;
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	u32 *arg = data;
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	writel_relaxed(*arg, mlink->tx_reg + INTR_SET_OFS);
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	return 0;
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}
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static int platform_mhu_startup(struct mbox_chan *chan)
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{
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	struct platform_mhu_link *mlink = chan->con_priv;
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	u32 val;
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	int ret;
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	val = readl_relaxed(mlink->tx_reg + INTR_STAT_OFS);
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	writel_relaxed(val, mlink->tx_reg + INTR_CLR_OFS);
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	ret = request_irq(mlink->irq, platform_mhu_rx_interrupt,
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			  IRQF_SHARED, "platform_mhu_link", chan);
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	if (ret) {
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		dev_err(chan->mbox->dev,
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			"Unable to acquire IRQ %d\n", mlink->irq);
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		return ret;
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	}
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	return 0;
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}
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static void platform_mhu_shutdown(struct mbox_chan *chan)
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{
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	struct platform_mhu_link *mlink = chan->con_priv;
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	free_irq(mlink->irq, chan);
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}
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static const struct mbox_chan_ops platform_mhu_ops = {
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	.send_data = platform_mhu_send_data,
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	.startup = platform_mhu_startup,
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	.shutdown = platform_mhu_shutdown,
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	.last_tx_done = platform_mhu_last_tx_done,
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};
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static int platform_mhu_probe(struct platform_device *pdev)
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{
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	int i, err;
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	struct platform_mhu *mhu;
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	struct device *dev = &pdev->dev;
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	struct resource *res;
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	int platform_mhu_reg[MHU_CHANS] = {
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		MHU_SEC_OFFSET, MHU_LP_OFFSET, MHU_HP_OFFSET
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	};
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	/* Allocate memory for device */
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	mhu = devm_kzalloc(dev, sizeof(*mhu), GFP_KERNEL);
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	if (!mhu)
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		return -ENOMEM;
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	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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	mhu->base = devm_ioremap_resource(dev, res);
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	if (IS_ERR(mhu->base)) {
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		dev_err(dev, "ioremap failed\n");
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		return PTR_ERR(mhu->base);
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	}
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	for (i = 0; i < MHU_CHANS; i++) {
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		mhu->chan[i].con_priv = &mhu->mlink[i];
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		mhu->mlink[i].irq = platform_get_irq(pdev, i);
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		if (mhu->mlink[i].irq < 0) {
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			dev_err(dev, "failed to get irq%d\n", i);
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			return mhu->mlink[i].irq;
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		}
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		mhu->mlink[i].rx_reg = mhu->base + platform_mhu_reg[i];
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		mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET;
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	}
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	mhu->mbox.dev = dev;
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	mhu->mbox.chans = &mhu->chan[0];
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	mhu->mbox.num_chans = MHU_CHANS;
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	mhu->mbox.ops = &platform_mhu_ops;
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	mhu->mbox.txdone_irq = false;
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	mhu->mbox.txdone_poll = true;
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	mhu->mbox.txpoll_period = 1;
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	platform_set_drvdata(pdev, mhu);
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	err = devm_mbox_controller_register(dev, &mhu->mbox);
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	if (err) {
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		dev_err(dev, "Failed to register mailboxes %d\n", err);
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		return err;
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	}
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	dev_info(dev, "Platform MHU Mailbox registered\n");
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	return 0;
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}
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static const struct of_device_id platform_mhu_dt_ids[] = {
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	{ .compatible = "amlogic,meson-gxbb-mhu", },
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	{ /* sentinel */ },
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};
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MODULE_DEVICE_TABLE(of, platform_mhu_dt_ids);
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static struct platform_driver platform_mhu_driver = {
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	.probe	= platform_mhu_probe,
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	.driver = {
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		.name = "platform-mhu",
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		.of_match_table	= platform_mhu_dt_ids,
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	},
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};
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module_platform_driver(platform_mhu_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:platform-mhu");
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MODULE_DESCRIPTION("Platform MHU Driver");
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MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
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