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	 af873fcece
			
		
	
	
		af873fcece
		
	
	
	
	
		
			
			Based on 1 normalized pattern(s): license terms gnu general public license gpl version 2 extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 161 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528170027.447718015@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
		
			
				
	
	
		
			63 lines
		
	
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			63 lines
		
	
	
	
		
			1.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0-only */
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| /*
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|  * stm32fx-clock.h
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|  *
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|  * Copyright (C) 2016 STMicroelectronics
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|  * Author: Gabriel Fernandez for STMicroelectronics.
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|  */
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| 
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| /*
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|  * List of clocks wich are not derived from system clock (SYSCLOCK)
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|  *
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|  * The index of these clocks is the secondary index of DT bindings
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|  * (see Documentatoin/devicetree/bindings/clock/st,stm32-rcc.txt)
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|  *
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|  * e.g:
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| 	<assigned-clocks = <&rcc 1 CLK_LSE>;
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| */
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| 
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| #ifndef _DT_BINDINGS_CLK_STMFX_H
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| #define _DT_BINDINGS_CLK_STMFX_H
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| 
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| #define SYSTICK			0
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| #define FCLK			1
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| #define CLK_LSI			2
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| #define CLK_LSE			3
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| #define CLK_HSE_RTC		4
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| #define CLK_RTC			5
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| #define PLL_VCO_I2S		6
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| #define PLL_VCO_SAI		7
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| #define CLK_LCD			8
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| #define CLK_I2S			9
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| #define CLK_SAI1		10
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| #define CLK_SAI2		11
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| #define CLK_I2SQ_PDIV		12
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| #define CLK_SAIQ_PDIV		13
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| #define CLK_HSI			14
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| #define CLK_SYSCLK		15
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| #define CLK_F469_DSI		16
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| 
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| #define END_PRIMARY_CLK		17
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| 
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| #define CLK_HDMI_CEC		16
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| #define CLK_SPDIF		17
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| #define CLK_USART1		18
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| #define CLK_USART2		19
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| #define CLK_USART3		20
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| #define CLK_UART4		21
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| #define CLK_UART5		22
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| #define CLK_USART6		23
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| #define CLK_UART7		24
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| #define CLK_UART8		25
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| #define CLK_I2C1		26
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| #define CLK_I2C2		27
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| #define CLK_I2C3		28
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| #define CLK_I2C4		29
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| #define CLK_LPTIMER		30
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| #define CLK_PLL_SRC		31
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| #define CLK_DFSDM1		32
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| #define CLK_ADFSDM1		33
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| #define CLK_F769_DSI		34
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| #define END_PRIMARY_CLK_F7	35
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| 
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| #endif
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