forked from mirrors/linux
		
	Clean up the existing export namespace code along the same lines of
commit 33def8498f ("treewide: Convert macro and uses of __section(foo)
to __section("foo")") and for the same reason, it is not desired for the
namespace argument to be a macro expansion itself.
Scripted using
  git grep -l -e MODULE_IMPORT_NS -e EXPORT_SYMBOL_NS | while read file;
  do
    awk -i inplace '
      /^#define EXPORT_SYMBOL_NS/ {
        gsub(/__stringify\(ns\)/, "ns");
        print;
        next;
      }
      /^#define MODULE_IMPORT_NS/ {
        gsub(/__stringify\(ns\)/, "ns");
        print;
        next;
      }
      /MODULE_IMPORT_NS/ {
        $0 = gensub(/MODULE_IMPORT_NS\(([^)]*)\)/, "MODULE_IMPORT_NS(\"\\1\")", "g");
      }
      /EXPORT_SYMBOL_NS/ {
        if ($0 ~ /(EXPORT_SYMBOL_NS[^(]*)\(([^,]+),/) {
  	if ($0 !~ /(EXPORT_SYMBOL_NS[^(]*)\(([^,]+), ([^)]+)\)/ &&
  	    $0 !~ /(EXPORT_SYMBOL_NS[^(]*)\(\)/ &&
  	    $0 !~ /^my/) {
  	  getline line;
  	  gsub(/[[:space:]]*\\$/, "");
  	  gsub(/[[:space:]]/, "", line);
  	  $0 = $0 " " line;
  	}
  	$0 = gensub(/(EXPORT_SYMBOL_NS[^(]*)\(([^,]+), ([^)]+)\)/,
  		    "\\1(\\2, \"\\3\")", "g");
        }
      }
      { print }' $file;
  done
Requested-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://mail.google.com/mail/u/2/#inbox/FMfcgzQXKWgMmjdFwwdsfgxzKpVHWPlc
Acked-by: Greg KH <gregkh@linuxfoundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
		
	
			
		
			
				
	
	
		
			74 lines
		
	
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			74 lines
		
	
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
// SPDX-License-Identifier: GPL-2.0
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/*
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 * DesignWare PWM Controller driver
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 *
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 * Copyright (C) 2018-2020 Intel Corporation
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 *
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 * Author: Felipe Balbi (Intel)
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 * Author: Jarkko Nikula <jarkko.nikula@linux.intel.com>
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 * Author: Raymond Tan <raymond.tan@intel.com>
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 */
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MODULE_IMPORT_NS("dwc_pwm");
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#define DWC_TIM_LD_CNT(n)	((n) * 0x14)
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#define DWC_TIM_LD_CNT2(n)	(((n) * 4) + 0xb0)
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#define DWC_TIM_CUR_VAL(n)	(((n) * 0x14) + 0x04)
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#define DWC_TIM_CTRL(n)		(((n) * 0x14) + 0x08)
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#define DWC_TIM_EOI(n)		(((n) * 0x14) + 0x0c)
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#define DWC_TIM_INT_STS(n)	(((n) * 0x14) + 0x10)
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#define DWC_TIMERS_INT_STS	0xa0
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#define DWC_TIMERS_EOI		0xa4
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#define DWC_TIMERS_RAW_INT_STS	0xa8
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#define DWC_TIMERS_COMP_VERSION	0xac
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#define DWC_TIMERS_TOTAL	8
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/* Timer Control Register */
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#define DWC_TIM_CTRL_EN		BIT(0)
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#define DWC_TIM_CTRL_MODE	BIT(1)
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#define DWC_TIM_CTRL_MODE_FREE	(0 << 1)
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#define DWC_TIM_CTRL_MODE_USER	(1 << 1)
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#define DWC_TIM_CTRL_INT_MASK	BIT(2)
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#define DWC_TIM_CTRL_PWM	BIT(3)
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struct dwc_pwm_info {
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	unsigned int nr;
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	unsigned int size;
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};
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struct dwc_pwm_drvdata {
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	const struct dwc_pwm_info *info;
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	void __iomem *io_base;
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	struct pwm_chip *chips[];
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};
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struct dwc_pwm_ctx {
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	u32 cnt;
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	u32 cnt2;
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	u32 ctrl;
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};
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struct dwc_pwm {
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	void __iomem *base;
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	unsigned int clk_ns;
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	struct dwc_pwm_ctx ctx[DWC_TIMERS_TOTAL];
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};
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static inline struct dwc_pwm *to_dwc_pwm(struct pwm_chip *chip)
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{
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	return pwmchip_get_drvdata(chip);
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}
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static inline u32 dwc_pwm_readl(struct dwc_pwm *dwc, u32 offset)
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{
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	return readl(dwc->base + offset);
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}
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static inline void dwc_pwm_writel(struct dwc_pwm *dwc, u32 value, u32 offset)
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{
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	writel(value, dwc->base + offset);
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}
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extern struct pwm_chip *dwc_pwm_alloc(struct device *dev);
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