forked from mirrors/linux
		
	 e793b284d7
			
		
	
	
		e793b284d7
		
	
	
	
	
		
			
			Follow the recent trend for the license description. This is also in an effort to fully sync the devicetrees with U-Boot. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
		
			
				
	
	
		
			251 lines
		
	
	
	
		
			4.2 KiB
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			251 lines
		
	
	
	
		
			4.2 KiB
		
	
	
	
		
			Text
		
	
	
	
	
	
| // SPDX-License-Identifier: (GPL-2.0+ OR X11)
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| /*
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|  * Copyright (C) 2015 Marek Vasut <marex@denx.de>
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|  */
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| 
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| #include "socfpga_cyclone5.dtsi"
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| #include <dt-bindings/gpio/gpio.h>
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| #include <dt-bindings/input/input.h>
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| 
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| / {
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| 	model = "samtec VIN|ING FPGA";
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| 	compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
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| 
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| 	chosen {
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| 		bootargs = "earlyprintk";
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| 		stdout-path = "serial0:115200n8";
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| 	};
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| 
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| 	memory@0 {
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| 		name = "memory";
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| 		device_type = "memory";
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| 		reg = <0x0 0x40000000>; /* 1GB */
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| 	};
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| 
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| 	aliases {
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| 		/*
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| 		 * This allow the ethaddr uboot environment variable contents
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| 		 * to be added to the gmac1 device tree blob.
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| 		 */
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| 		ethernet0 = &gmac1;
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| 		ethernet1 = &gmac0;
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| 	};
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| 
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| 	gpio-keys {
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| 		compatible = "gpio-keys";
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| 
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| 		hps_temp0 {
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| 			label = "BTN_0";			/* TEMP_OS */
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| 			gpios = <&portc 18 GPIO_ACTIVE_LOW>;	/* HPS_GPIO60 */
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| 			linux,code = <BTN_0>;
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| 		};
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| 
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| 		hps_hkey0 {
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| 			label = "BTN_1";			/* DIS_PWR */
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| 			gpios = <&portc 19 GPIO_ACTIVE_LOW>;	/* HPS_GPIO61 */
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| 			linux,code = <BTN_1>;
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| 		};
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| 
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| 		hps_hkey1 {
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| 			label = "hps_hkey1";			/* POWER_DOWN */
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| 			gpios = <&portc 20 GPIO_ACTIVE_LOW>;	/* HPS_GPIO62 */
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| 			linux,code = <KEY_POWER>;
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| 		};
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| 	};
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| 
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| 	regulator-usb-nrst {
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| 		compatible = "regulator-fixed";
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| 		regulator-name = "usb_nrst";
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| 		regulator-min-microvolt = <5000000>;
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| 		regulator-max-microvolt = <5000000>;
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| 		gpio = <&portb 5 GPIO_ACTIVE_HIGH>;
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| 		startup-delay-us = <70000>;
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| 		enable-active-high;
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| 		regulator-always-on;
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| 	};
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| };
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| 
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| &gmac1 {
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| 	status = "okay";
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| 	phy-mode = "rgmii";
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| 	phy-handle = <&phy1>;
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| 
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| 	snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
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| 	snps,reset-active-low;
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| 	snps,reset-delays-us = <10000 10000 10000>;
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| 
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| 	mdio0 {
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		compatible = "snps,dwmac-mdio";
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| 		phy1: ethernet-phy@1 {
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| 			reg = <1>;
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| 			rxd0-skew-ps = <0>;
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| 			rxd1-skew-ps = <0>;
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| 			rxd2-skew-ps = <0>;
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| 			rxd3-skew-ps = <0>;
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| 			txen-skew-ps = <0>;
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| 			txc-skew-ps = <2600>;
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| 			rxdv-skew-ps = <0>;
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| 			rxc-skew-ps = <2000>;
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| 		};
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| 	};
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| };
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| 
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| &gpio0 {	/* GPIO 0..29 */
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| 	status = "okay";
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| };
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| 
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| &gpio1 {	/* GPIO 30..57 */
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| 	status = "okay";
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| };
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| 
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| &gpio2 {	/* GPIO 58..66 (HLGPI 0..13 at offset 13) */
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| 	status = "okay";
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| };
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| 
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| &i2c0 {
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| 	status = "okay";
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| 
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| 	gpio: pca9557@1f {
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| 		compatible = "nxp,pca9557";
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| 		reg = <0x1f>;
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| 		gpio-controller;
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| 		#gpio-cells = <2>;
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| 	};
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| 
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| 	temp: lm75@48 {
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| 		compatible = "lm75";
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| 		reg = <0x48>;
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| 	};
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| 
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| 	at24@50 {
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| 		compatible = "atmel,24c01";
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| 		pagesize = <8>;
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| 		reg = <0x50>;
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| 	};
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| 
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| 	i2cswitch@70 {
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| 		compatible = "nxp,pca9548";
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		reg = <0x70>;
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| 
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| 		i2c@0 {
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <0>;
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| 		};
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| 
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| 		i2c@1 {
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <1>;
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| 		};
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| 
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| 		i2c@2 {
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <2>;
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| 		};
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| 
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| 		i2c@3 {
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <3>;
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| 		};
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| 
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| 		i2c@4 {
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <4>;
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| 		};
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| 
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| 		i2c@5 {
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <5>;
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| 		};
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| 
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| 		i2c@6 {	/* Backplane EEPROM */
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <6>;
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| 			eeprom@51 {
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| 				compatible = "atmel,24c01";
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| 				pagesize = <8>;
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| 				reg = <0x51>;
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| 			};
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| 		};
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| 
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| 		i2c@7 {	/* Power board EEPROM */
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 			reg = <7>;
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| 			eeprom@51 {
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| 				compatible = "atmel,24c01";
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| 				pagesize = <8>;
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| 				reg = <0x51>;
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| 			};
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| 		};
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| 	};
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| };
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| 
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| &i2c1 {
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| 	status = "okay";
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| 	clock-frequency = <100000>;
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| 
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| 	at24@50 {
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| 		compatible = "atmel,24c02";
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| 		pagesize = <8>;
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| 		reg = <0x50>;
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| 	};
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| };
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| 
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| &qspi {
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| 	status = "okay";
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| 
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| 	n25q128@0 {
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 		compatible = "n25q128";
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| 		reg = <0>;		/* chip select */
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| 		spi-max-frequency = <100000000>;
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| 		m25p,fast-read;
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| 
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| 		cdns,page-size = <256>;
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| 		cdns,block-size = <16>;
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| 		cdns,read-delay = <4>;
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| 		cdns,tshsl-ns = <50>;
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| 		cdns,tsd2d-ns = <50>;
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| 		cdns,tchsh-ns = <4>;
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| 		cdns,tslch-ns = <4>;
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| 	};
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| 
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| 	n25q00@1 {
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 		compatible = "n25q00";
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| 		reg = <1>;		/* chip select */
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| 		spi-max-frequency = <100000000>;
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| 		m25p,fast-read;
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| 
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| 		cdns,page-size = <256>;
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| 		cdns,block-size = <16>;
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| 		cdns,read-delay = <4>;
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| 		cdns,tshsl-ns = <50>;
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| 		cdns,tsd2d-ns = <50>;
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| 		cdns,tchsh-ns = <4>;
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| 		cdns,tslch-ns = <4>;
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| 	};
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| };
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| 
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| &usb0 {
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| 	dr_mode = "host";
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| 	status = "okay";
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| };
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| 
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| &usb1 {
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| 	dr_mode = "peripheral";
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| 	status = "okay";
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| };
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