forked from mirrors/linux
535113896e
Add a family of ginvt_* functions making it easy to emit a GINVT instruction to globally invalidate TLB entries. We make use of the _ASM_MACRO infrastructure to support emitting the instructions even if the assembler isn't new enough to support them natively. An associated STYPE_GINV definition & sync_ginv() function are added to emit a sync instruction of type 0x14, which operates as a completion barrier for these new GINVT (and GINVI) instructions. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
56 lines
1 KiB
C
56 lines
1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __MIPS_ASM_GINVT_H__
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#define __MIPS_ASM_GINVT_H__
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#include <asm/mipsregs.h>
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enum ginvt_type {
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GINVT_FULL,
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GINVT_VA,
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GINVT_MMID,
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};
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#ifdef TOOLCHAIN_SUPPORTS_GINV
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# define _ASM_SET_GINV ".set ginv\n"
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#else
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_ASM_MACRO_1R1I(ginvt, rs, type,
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_ASM_INSN_IF_MIPS(0x7c0000bd | (__rs << 21) | (\\type << 8))
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_ASM_INSN32_IF_MM(0x0000717c | (__rs << 16) | (\\type << 9)));
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# define _ASM_SET_GINV
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#endif
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static inline void ginvt(unsigned long addr, enum ginvt_type type)
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{
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asm volatile(
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".set push\n"
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_ASM_SET_GINV
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" ginvt %0, %1\n"
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".set pop"
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: /* no outputs */
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: "r"(addr), "i"(type)
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: "memory");
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}
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static inline void ginvt_full(void)
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{
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ginvt(0, GINVT_FULL);
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}
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static inline void ginvt_va(unsigned long addr)
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{
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addr &= PAGE_MASK << 1;
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ginvt(addr, GINVT_VA);
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}
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static inline void ginvt_mmid(void)
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{
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ginvt(0, GINVT_MMID);
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}
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static inline void ginvt_va_mmid(unsigned long addr)
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{
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addr &= PAGE_MASK << 1;
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ginvt(addr, GINVT_VA | GINVT_MMID);
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}
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#endif /* __MIPS_ASM_GINVT_H__ */
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