forked from mirrors/linux
		
	 346e91ee09
			
		
	
	
		346e91ee09
		
	
	
	
	
		
			
			The mmiowb() macro is horribly difficult to use and drivers will continue to work most of the time if they omit a call when it is required. Rather than rely on driver authors getting this right, push mmiowb() into arch_spin_unlock() for mips. If this is deemed to be a performance issue, a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide the barrier in cases where no I/O writes were performed inside the critical section. Acked-by: Paul Burton <paul.burton@mips.com> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
		
			
				
	
	
		
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			C
		
	
	
	
	
	
			
		
		
	
	
			31 lines
		
	
	
	
		
			822 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * This file is subject to the terms and conditions of the GNU General Public
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|  * License.  See the file "COPYING" in the main directory of this archive
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|  * for more details.
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|  *
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|  * Copyright (C) 1999, 2000, 06 Ralf Baechle (ralf@linux-mips.org)
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|  * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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|  */
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| #ifndef _ASM_SPINLOCK_H
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| #define _ASM_SPINLOCK_H
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| 
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| #include <asm/processor.h>
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| #include <asm/qrwlock.h>
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| 
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| #include <asm-generic/qspinlock_types.h>
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| 
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| #define	queued_spin_unlock queued_spin_unlock
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| /**
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|  * queued_spin_unlock - release a queued spinlock
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|  * @lock : Pointer to queued spinlock structure
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|  */
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| static inline void queued_spin_unlock(struct qspinlock *lock)
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| {
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| 	/* This could be optimised with ARCH_HAS_MMIOWB */
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| 	mmiowb();
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| 	smp_store_release(&lock->locked, 0);
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| }
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| 
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| #include <asm/qspinlock.h>
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| 
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| #endif /* _ASM_SPINLOCK_H */
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