forked from mirrors/linux
71cc64a85d
The current implementation of TID allocation, using a global IDR, may result in an errant process starving the system of available TIDs. Instead, use task_pid_nr(), as mentioned by the original author. The scenario described which prevented it's use is not applicable, as set_thread_tidr can only be called after the task struct has been populated. In the unlikely event that 2 threads share the TID and are waiting, all potential outcomes have been determined safe. Signed-off-by: Alastair D'Silva <alastair@d-silva.org> Reviewed-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
98 lines
2.6 KiB
C
98 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
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*/
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#ifndef _ASM_POWERPC_SWITCH_TO_H
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#define _ASM_POWERPC_SWITCH_TO_H
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#include <asm/reg.h>
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struct thread_struct;
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struct task_struct;
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struct pt_regs;
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extern struct task_struct *__switch_to(struct task_struct *,
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struct task_struct *);
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#define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
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extern struct task_struct *_switch(struct thread_struct *prev,
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struct thread_struct *next);
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extern void switch_booke_debug_regs(struct debug_reg *new_debug);
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extern int emulate_altivec(struct pt_regs *);
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extern void flush_all_to_thread(struct task_struct *);
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extern void giveup_all(struct task_struct *);
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#ifdef CONFIG_PPC_FPU
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extern void enable_kernel_fp(void);
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extern void flush_fp_to_thread(struct task_struct *);
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extern void giveup_fpu(struct task_struct *);
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extern void save_fpu(struct task_struct *);
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static inline void disable_kernel_fp(void)
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{
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msr_check_and_clear(MSR_FP);
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}
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#else
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static inline void save_fpu(struct task_struct *t) { }
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static inline void flush_fp_to_thread(struct task_struct *t) { }
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#endif
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#ifdef CONFIG_ALTIVEC
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extern void enable_kernel_altivec(void);
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extern void flush_altivec_to_thread(struct task_struct *);
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extern void giveup_altivec(struct task_struct *);
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extern void save_altivec(struct task_struct *);
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static inline void disable_kernel_altivec(void)
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{
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msr_check_and_clear(MSR_VEC);
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}
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#else
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static inline void save_altivec(struct task_struct *t) { }
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static inline void __giveup_altivec(struct task_struct *t) { }
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#endif
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#ifdef CONFIG_VSX
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extern void enable_kernel_vsx(void);
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extern void flush_vsx_to_thread(struct task_struct *);
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static inline void disable_kernel_vsx(void)
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{
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msr_check_and_clear(MSR_FP|MSR_VEC|MSR_VSX);
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}
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#endif
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#ifdef CONFIG_SPE
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extern void enable_kernel_spe(void);
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extern void flush_spe_to_thread(struct task_struct *);
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extern void giveup_spe(struct task_struct *);
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extern void __giveup_spe(struct task_struct *);
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static inline void disable_kernel_spe(void)
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{
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msr_check_and_clear(MSR_SPE);
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}
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#else
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static inline void __giveup_spe(struct task_struct *t) { }
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#endif
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static inline void clear_task_ebb(struct task_struct *t)
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{
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#ifdef CONFIG_PPC_BOOK3S_64
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/* EBB perf events are not inherited, so clear all EBB state. */
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t->thread.ebbrr = 0;
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t->thread.ebbhr = 0;
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t->thread.bescr = 0;
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t->thread.mmcr2 = 0;
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t->thread.mmcr0 = 0;
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t->thread.siar = 0;
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t->thread.sdar = 0;
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t->thread.sier = 0;
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t->thread.used_ebb = 0;
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#endif
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}
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extern int set_thread_uses_vas(void);
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extern int set_thread_tidr(struct task_struct *t);
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#endif /* _ASM_POWERPC_SWITCH_TO_H */
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