forked from mirrors/linux
6a0abce4c4
Update license to use SPDX-License-Identifier instead of verbose license text. Link: http://lkml.kernel.org/r/87ftvccszx.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Cc: Rich Felker <dalias@libc.org> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
69 lines
3.2 KiB
C
69 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* linux/include/asm-sh/microdev.h
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*
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* Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
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*
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* Definitions for the SuperH SH4-202 MicroDev board.
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*/
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#ifndef __ASM_SH_MICRODEV_H
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#define __ASM_SH_MICRODEV_H
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extern void init_microdev_irq(void);
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extern void microdev_print_fpga_intc_status(void);
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/*
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* The following are useful macros for manipulating the interrupt
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* controller (INTC) on the CPU-board FPGA. should be noted that there
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* is an INTC on the FPGA, and a separate INTC on the SH4-202 core -
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* these are two different things, both of which need to be prorammed to
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* correctly route - unfortunately, they have the same name and
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* abbreviations!
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*/
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#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */
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#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */
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#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */
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#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */
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#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */
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#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */
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#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */
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#define MICRODEV_FPGA_INTSRC_REG (MICRODEV_FPGA_INTC_BASE+0x30ul) /* Interrupt Source Register on INTC on CPU-board FPGA */
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#define MICRODEV_FPGA_INTREQ_REG (MICRODEV_FPGA_INTC_BASE+0x38ul) /* Interrupt Request Register on INTC on CPU-board FPGA */
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/*
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* The following are the IRQ numbers for the Linux Kernel for external
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* interrupts. i.e. the numbers seen by 'cat /proc/interrupt'.
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*/
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#define MICRODEV_LINUX_IRQ_KEYBOARD 1 /* SuperIO Keyboard */
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#define MICRODEV_LINUX_IRQ_SERIAL1 2 /* SuperIO Serial #1 */
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#define MICRODEV_LINUX_IRQ_ETHERNET 3 /* on-board Ethnernet */
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#define MICRODEV_LINUX_IRQ_SERIAL2 4 /* SuperIO Serial #2 */
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#define MICRODEV_LINUX_IRQ_USB_HC 7 /* on-board USB HC */
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#define MICRODEV_LINUX_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */
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#define MICRODEV_LINUX_IRQ_IDE2 13 /* SuperIO IDE #2 */
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#define MICRODEV_LINUX_IRQ_IDE1 14 /* SuperIO IDE #1 */
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/*
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* The following are the IRQ numbers for the INTC on the FPGA for
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* external interrupts. i.e. the bits in the INTC registers in the
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* FPGA.
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*/
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#define MICRODEV_FPGA_IRQ_KEYBOARD 1 /* SuperIO Keyboard */
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#define MICRODEV_FPGA_IRQ_SERIAL1 3 /* SuperIO Serial #1 */
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#define MICRODEV_FPGA_IRQ_SERIAL2 4 /* SuperIO Serial #2 */
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#define MICRODEV_FPGA_IRQ_MOUSE 12 /* SuperIO PS/2 Mouse */
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#define MICRODEV_FPGA_IRQ_IDE1 14 /* SuperIO IDE #1 */
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#define MICRODEV_FPGA_IRQ_IDE2 15 /* SuperIO IDE #2 */
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#define MICRODEV_FPGA_IRQ_USB_HC 16 /* on-board USB HC */
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#define MICRODEV_FPGA_IRQ_ETHERNET 18 /* on-board Ethnernet */
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#define MICRODEV_IRQ_PCI_INTA 8
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#define MICRODEV_IRQ_PCI_INTB 9
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#define MICRODEV_IRQ_PCI_INTC 10
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#define MICRODEV_IRQ_PCI_INTD 11
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#define __IO_PREFIX microdev
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#include <asm/io_generic.h>
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#endif /* __ASM_SH_MICRODEV_H */
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