forked from mirrors/linux
		
	 0c06f5d43e
			
		
	
	
		0c06f5d43e
		
	
	
	
	
		
			
			Both cores are another exceptions. They are not accessed in a standard way and to they don't need or have wrapping addresses. This fixes bus scanning after finding such core. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
		
			
				
	
	
		
			530 lines
		
	
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			530 lines
		
	
	
	
		
			14 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Broadcom specific AMBA
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|  * Bus scanning
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|  *
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|  * Licensed under the GNU/GPL. See COPYING for details.
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|  */
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| 
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| #include "scan.h"
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| #include "bcma_private.h"
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| 
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| #include <linux/bcma/bcma.h>
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| #include <linux/bcma/bcma_regs.h>
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| #include <linux/pci.h>
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| #include <linux/io.h>
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| #include <linux/dma-mapping.h>
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| #include <linux/slab.h>
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| 
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| struct bcma_device_id_name {
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| 	u16 id;
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| 	const char *name;
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| };
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| 
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| static const struct bcma_device_id_name bcma_arm_device_names[] = {
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| 	{ BCMA_CORE_4706_MAC_GBIT_COMMON, "BCM4706 GBit MAC Common" },
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| 	{ BCMA_CORE_ARM_1176, "ARM 1176" },
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| 	{ BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
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| 	{ BCMA_CORE_ARM_CM3, "ARM CM3" },
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| };
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| 
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| static const struct bcma_device_id_name bcma_bcm_device_names[] = {
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| 	{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
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| 	{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
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| 	{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
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| 	{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
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| 	{ BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
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| 	{ BCMA_CORE_NS_DMA, "DMA" },
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| 	{ BCMA_CORE_NS_SDIO3, "SDIO3" },
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| 	{ BCMA_CORE_NS_USB20, "USB 2.0" },
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| 	{ BCMA_CORE_NS_USB30, "USB 3.0" },
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| 	{ BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
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| 	{ BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
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| 	{ BCMA_CORE_NS_ROM, "ROM" },
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| 	{ BCMA_CORE_NS_NAND, "NAND flash controller" },
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| 	{ BCMA_CORE_NS_QSPI, "SPI flash controller" },
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| 	{ BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
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| 	{ BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
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| 	{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
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| 	{ BCMA_CORE_ALTA, "ALTA (I2S)" },
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| 	{ BCMA_CORE_INVALID, "Invalid" },
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| 	{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
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| 	{ BCMA_CORE_ILINE20, "ILine 20" },
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| 	{ BCMA_CORE_SRAM, "SRAM" },
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| 	{ BCMA_CORE_SDRAM, "SDRAM" },
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| 	{ BCMA_CORE_PCI, "PCI" },
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| 	{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
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| 	{ BCMA_CORE_V90, "V90" },
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| 	{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
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| 	{ BCMA_CORE_ADSL, "ADSL" },
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| 	{ BCMA_CORE_ILINE100, "ILine 100" },
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| 	{ BCMA_CORE_IPSEC, "IPSEC" },
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| 	{ BCMA_CORE_UTOPIA, "UTOPIA" },
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| 	{ BCMA_CORE_PCMCIA, "PCMCIA" },
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| 	{ BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
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| 	{ BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
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| 	{ BCMA_CORE_OFDM, "OFDM" },
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| 	{ BCMA_CORE_EXTIF, "EXTIF" },
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| 	{ BCMA_CORE_80211, "IEEE 802.11" },
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| 	{ BCMA_CORE_PHY_A, "PHY A" },
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| 	{ BCMA_CORE_PHY_B, "PHY B" },
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| 	{ BCMA_CORE_PHY_G, "PHY G" },
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| 	{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
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| 	{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
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| 	{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
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| 	{ BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
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| 	{ BCMA_CORE_SDIO_HOST, "SDIO Host" },
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| 	{ BCMA_CORE_ROBOSWITCH, "Roboswitch" },
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| 	{ BCMA_CORE_PARA_ATA, "PATA" },
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| 	{ BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
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| 	{ BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
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| 	{ BCMA_CORE_PCIE, "PCIe" },
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| 	{ BCMA_CORE_PHY_N, "PHY N" },
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| 	{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
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| 	{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
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| 	{ BCMA_CORE_PHY_LP, "PHY LP" },
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| 	{ BCMA_CORE_PMU, "PMU" },
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| 	{ BCMA_CORE_PHY_SSN, "PHY SSN" },
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| 	{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
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| 	{ BCMA_CORE_PHY_HT, "PHY HT" },
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| 	{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
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| 	{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
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| 	{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
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| 	{ BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
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| 	{ BCMA_CORE_SHARED_COMMON, "Common Shared" },
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| 	{ BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
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| 	{ BCMA_CORE_SPI_HOST, "SPI Host" },
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| 	{ BCMA_CORE_I2S, "I2S" },
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| 	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
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| 	{ BCMA_CORE_SHIM, "SHIM" },
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| 	{ BCMA_CORE_PCIE2, "PCIe Gen2" },
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| 	{ BCMA_CORE_ARM_CR4, "ARM CR4" },
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| 	{ BCMA_CORE_GCI, "GCI" },
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| 	{ BCMA_CORE_CMEM, "CNDS DDR2/3 memory controller" },
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| 	{ BCMA_CORE_ARM_CA7, "ARM CA7" },
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| 	{ BCMA_CORE_DEFAULT, "Default" },
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| };
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| 
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| static const struct bcma_device_id_name bcma_mips_device_names[] = {
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| 	{ BCMA_CORE_MIPS, "MIPS" },
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| 	{ BCMA_CORE_MIPS_3302, "MIPS 3302" },
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| 	{ BCMA_CORE_MIPS_74K, "MIPS 74K" },
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| };
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| 
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| static const char *bcma_device_name(const struct bcma_device_id *id)
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| {
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| 	const struct bcma_device_id_name *names;
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| 	int size, i;
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| 
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| 	/* search manufacturer specific names */
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| 	switch (id->manuf) {
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| 	case BCMA_MANUF_ARM:
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| 		names = bcma_arm_device_names;
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| 		size = ARRAY_SIZE(bcma_arm_device_names);
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| 		break;
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| 	case BCMA_MANUF_BCM:
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| 		names = bcma_bcm_device_names;
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| 		size = ARRAY_SIZE(bcma_bcm_device_names);
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| 		break;
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| 	case BCMA_MANUF_MIPS:
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| 		names = bcma_mips_device_names;
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| 		size = ARRAY_SIZE(bcma_mips_device_names);
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| 		break;
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| 	default:
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| 		return "UNKNOWN";
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| 	}
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| 
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| 	for (i = 0; i < size; i++) {
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| 		if (names[i].id == id->id)
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| 			return names[i].name;
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| 	}
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| 
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| 	return "UNKNOWN";
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| }
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| 
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| static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
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| 		       u16 offset)
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| {
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| 	return readl(bus->mmio + offset);
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| }
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| 
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| static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
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| {
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| 	if (bus->hosttype == BCMA_HOSTTYPE_PCI)
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| 		pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
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| 				       addr);
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| }
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| 
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| static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 __iomem **eromptr)
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| {
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| 	u32 ent = readl(*eromptr);
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| 	(*eromptr)++;
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| 	return ent;
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| }
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| 
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| static void bcma_erom_push_ent(u32 __iomem **eromptr)
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| {
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| 	(*eromptr)--;
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| }
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| 
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| static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 __iomem **eromptr)
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| {
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| 	u32 ent = bcma_erom_get_ent(bus, eromptr);
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| 	if (!(ent & SCAN_ER_VALID))
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| 		return -ENOENT;
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| 	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
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| 		return -ENOENT;
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| 	return ent;
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| }
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| 
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| static bool bcma_erom_is_end(struct bcma_bus *bus, u32 __iomem **eromptr)
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| {
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| 	u32 ent = bcma_erom_get_ent(bus, eromptr);
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| 	bcma_erom_push_ent(eromptr);
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| 	return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
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| }
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| 
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| static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 __iomem **eromptr)
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| {
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| 	u32 ent = bcma_erom_get_ent(bus, eromptr);
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| 	bcma_erom_push_ent(eromptr);
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| 	return (((ent & SCAN_ER_VALID)) &&
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| 		((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
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| 		((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
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| }
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| 
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| static void bcma_erom_skip_component(struct bcma_bus *bus, u32 __iomem **eromptr)
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| {
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| 	u32 ent;
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| 	while (1) {
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| 		ent = bcma_erom_get_ent(bus, eromptr);
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| 		if ((ent & SCAN_ER_VALID) &&
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| 		    ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
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| 			break;
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| 		if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
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| 			break;
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| 	}
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| 	bcma_erom_push_ent(eromptr);
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| }
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| 
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| static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 __iomem **eromptr)
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| {
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| 	u32 ent = bcma_erom_get_ent(bus, eromptr);
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| 	if (!(ent & SCAN_ER_VALID))
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| 		return -ENOENT;
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| 	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
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| 		return -ENOENT;
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| 	return ent;
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| }
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| 
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| static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
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| 				  u32 type, u8 port)
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| {
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| 	u32 addrl, addrh, sizel, sizeh = 0;
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| 	u32 size;
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| 
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| 	u32 ent = bcma_erom_get_ent(bus, eromptr);
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| 	if ((!(ent & SCAN_ER_VALID)) ||
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| 	    ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
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| 	    ((ent & SCAN_ADDR_TYPE) != type) ||
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| 	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
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| 		bcma_erom_push_ent(eromptr);
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| 		return (u32)-EINVAL;
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| 	}
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| 
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| 	addrl = ent & SCAN_ADDR_ADDR;
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| 	if (ent & SCAN_ADDR_AG32)
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| 		addrh = bcma_erom_get_ent(bus, eromptr);
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| 	else
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| 		addrh = 0;
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| 
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| 	if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
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| 		size = bcma_erom_get_ent(bus, eromptr);
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| 		sizel = size & SCAN_SIZE_SZ;
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| 		if (size & SCAN_SIZE_SG32)
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| 			sizeh = bcma_erom_get_ent(bus, eromptr);
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| 	} else
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| 		sizel = SCAN_ADDR_SZ_BASE <<
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| 				((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
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| 
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| 	return addrl;
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| }
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| 
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| static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus,
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| 						   u16 index)
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| {
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| 	struct bcma_device *core;
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| 
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| 	list_for_each_entry(core, &bus->cores, list) {
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| 		if (core->core_index == index)
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| 			return core;
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| 	}
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| 	return NULL;
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| }
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| 
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| static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid)
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| {
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| 	struct bcma_device *core;
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| 
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| 	list_for_each_entry_reverse(core, &bus->cores, list) {
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| 		if (core->id.id == coreid)
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| 			return core;
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| 	}
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| 	return NULL;
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| }
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| 
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| #define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO)
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| 
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| static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
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| 			      struct bcma_device_id *match, int core_num,
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| 			      struct bcma_device *core)
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| {
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| 	u32 tmp;
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| 	u8 i, j, k;
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| 	s32 cia, cib;
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| 	u8 ports[2], wrappers[2];
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| 
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| 	/* get CIs */
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| 	cia = bcma_erom_get_ci(bus, eromptr);
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| 	if (cia < 0) {
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| 		bcma_erom_push_ent(eromptr);
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| 		if (bcma_erom_is_end(bus, eromptr))
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| 			return -ESPIPE;
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| 		return -EILSEQ;
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| 	}
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| 	cib = bcma_erom_get_ci(bus, eromptr);
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| 	if (cib < 0)
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| 		return -EILSEQ;
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| 
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| 	/* parse CIs */
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| 	core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
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| 	core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
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| 	core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
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| 	ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
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| 	ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
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| 	wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
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| 	wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
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| 	core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
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| 
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| 	if (((core->id.manuf == BCMA_MANUF_ARM) &&
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| 	     (core->id.id == 0xFFF)) ||
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| 	    (ports[1] == 0)) {
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| 		bcma_erom_skip_component(bus, eromptr);
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| 		return -ENXIO;
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| 	}
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| 
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| 	/* check if component is a core at all */
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| 	if (wrappers[0] + wrappers[1] == 0) {
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| 		/* Some specific cores don't need wrappers */
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| 		switch (core->id.id) {
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| 		case BCMA_CORE_4706_MAC_GBIT_COMMON:
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| 		case BCMA_CORE_NS_CHIPCOMMON_B:
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| 		case BCMA_CORE_PMU:
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| 		case BCMA_CORE_GCI:
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| 		/* Not used yet: case BCMA_CORE_OOB_ROUTER: */
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| 			break;
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| 		default:
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| 			bcma_erom_skip_component(bus, eromptr);
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| 			return -ENXIO;
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| 		}
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| 	}
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| 
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| 	if (bcma_erom_is_bridge(bus, eromptr)) {
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| 		bcma_erom_skip_component(bus, eromptr);
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| 		return -ENXIO;
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| 	}
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| 
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| 	if (bcma_find_core_by_index(bus, core_num)) {
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| 		bcma_erom_skip_component(bus, eromptr);
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| 		return -ENODEV;
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| 	}
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| 
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| 	if (match && ((match->manuf != BCMA_ANY_MANUF &&
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| 	      match->manuf != core->id.manuf) ||
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| 	     (match->id != BCMA_ANY_ID && match->id != core->id.id) ||
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| 	     (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) ||
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| 	     (match->class != BCMA_ANY_CLASS && match->class != core->id.class)
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| 	    )) {
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| 		bcma_erom_skip_component(bus, eromptr);
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| 		return -ENODEV;
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| 	}
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| 
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| 	/* get & parse master ports */
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| 	for (i = 0; i < ports[0]; i++) {
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| 		s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
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| 		if (mst_port_d < 0)
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| 			return -EILSEQ;
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| 	}
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| 
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| 	/* First Slave Address Descriptor should be port 0:
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| 	 * the main register space for the core
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| 	 */
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| 	tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
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| 	if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
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| 		/* Try again to see if it is a bridge */
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| 		tmp = bcma_erom_get_addr_desc(bus, eromptr,
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| 					      SCAN_ADDR_TYPE_BRIDGE, 0);
 | |
| 		if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) {
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| 			return -EILSEQ;
 | |
| 		} else {
 | |
| 			bcma_info(bus, "Bridge found\n");
 | |
| 			return -ENXIO;
 | |
| 		}
 | |
| 	}
 | |
| 	core->addr = tmp;
 | |
| 
 | |
| 	/* get & parse slave ports */
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| 	k = 0;
 | |
| 	for (i = 0; i < ports[1]; i++) {
 | |
| 		for (j = 0; ; j++) {
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| 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
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| 				SCAN_ADDR_TYPE_SLAVE, i);
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| 			if (IS_ERR_VALUE_U32(tmp)) {
 | |
| 				/* no more entries for port _i_ */
 | |
| 				/* pr_debug("erom: slave port %d "
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| 				 * "has %d descriptors\n", i, j); */
 | |
| 				break;
 | |
| 			} else if (k < ARRAY_SIZE(core->addr_s)) {
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| 				core->addr_s[k] = tmp;
 | |
| 				k++;
 | |
| 			}
 | |
| 		}
 | |
| 	}
 | |
| 
 | |
| 	/* get & parse master wrappers */
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| 	for (i = 0; i < wrappers[0]; i++) {
 | |
| 		for (j = 0; ; j++) {
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| 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
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| 				SCAN_ADDR_TYPE_MWRAP, i);
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| 			if (IS_ERR_VALUE_U32(tmp)) {
 | |
| 				/* no more entries for port _i_ */
 | |
| 				/* pr_debug("erom: master wrapper %d "
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| 				 * "has %d descriptors\n", i, j); */
 | |
| 				break;
 | |
| 			} else {
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| 				if (i == 0 && j == 0)
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| 					core->wrap = tmp;
 | |
| 			}
 | |
| 		}
 | |
| 	}
 | |
| 
 | |
| 	/* get & parse slave wrappers */
 | |
| 	for (i = 0; i < wrappers[1]; i++) {
 | |
| 		u8 hack = (ports[1] == 1) ? 0 : 1;
 | |
| 		for (j = 0; ; j++) {
 | |
| 			tmp = bcma_erom_get_addr_desc(bus, eromptr,
 | |
| 				SCAN_ADDR_TYPE_SWRAP, i + hack);
 | |
| 			if (IS_ERR_VALUE_U32(tmp)) {
 | |
| 				/* no more entries for port _i_ */
 | |
| 				/* pr_debug("erom: master wrapper %d "
 | |
| 				 * has %d descriptors\n", i, j); */
 | |
| 				break;
 | |
| 			} else {
 | |
| 				if (wrappers[0] == 0 && !i && !j)
 | |
| 					core->wrap = tmp;
 | |
| 			}
 | |
| 		}
 | |
| 	}
 | |
| 	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
 | |
| 		core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
 | |
| 		if (!core->io_addr)
 | |
| 			return -ENOMEM;
 | |
| 		if (core->wrap) {
 | |
| 			core->io_wrap = ioremap_nocache(core->wrap,
 | |
| 							BCMA_CORE_SIZE);
 | |
| 			if (!core->io_wrap) {
 | |
| 				iounmap(core->io_addr);
 | |
| 				return -ENOMEM;
 | |
| 			}
 | |
| 		}
 | |
| 	}
 | |
| 	return 0;
 | |
| }
 | |
| 
 | |
| void bcma_detect_chip(struct bcma_bus *bus)
 | |
| {
 | |
| 	s32 tmp;
 | |
| 	struct bcma_chipinfo *chipinfo = &(bus->chipinfo);
 | |
| 	char chip_id[8];
 | |
| 
 | |
| 	bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
 | |
| 
 | |
| 	tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
 | |
| 	chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
 | |
| 	chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
 | |
| 	chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
 | |
| 
 | |
| 	snprintf(chip_id, ARRAY_SIZE(chip_id),
 | |
| 		 (chipinfo->id > 0x9999) ? "%d" : "0x%04X", chipinfo->id);
 | |
| 	bcma_info(bus, "Found chip with id %s, rev 0x%02X and package 0x%02X\n",
 | |
| 		  chip_id, chipinfo->rev, chipinfo->pkg);
 | |
| }
 | |
| 
 | |
| int bcma_bus_scan(struct bcma_bus *bus)
 | |
| {
 | |
| 	u32 erombase;
 | |
| 	u32 __iomem *eromptr, *eromend;
 | |
| 
 | |
| 	int err, core_num = 0;
 | |
| 
 | |
| 	/* Skip if bus was already scanned (e.g. during early register) */
 | |
| 	if (bus->nr_cores)
 | |
| 		return 0;
 | |
| 
 | |
| 	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
 | |
| 	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
 | |
| 		eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
 | |
| 		if (!eromptr)
 | |
| 			return -ENOMEM;
 | |
| 	} else {
 | |
| 		eromptr = bus->mmio;
 | |
| 	}
 | |
| 
 | |
| 	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
 | |
| 
 | |
| 	bcma_scan_switch_core(bus, erombase);
 | |
| 
 | |
| 	while (eromptr < eromend) {
 | |
| 		struct bcma_device *other_core;
 | |
| 		struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
 | |
| 		if (!core) {
 | |
| 			err = -ENOMEM;
 | |
| 			goto out;
 | |
| 		}
 | |
| 		INIT_LIST_HEAD(&core->list);
 | |
| 		core->bus = bus;
 | |
| 
 | |
| 		err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core);
 | |
| 		if (err < 0) {
 | |
| 			kfree(core);
 | |
| 			if (err == -ENODEV) {
 | |
| 				core_num++;
 | |
| 				continue;
 | |
| 			} else if (err == -ENXIO) {
 | |
| 				continue;
 | |
| 			} else if (err == -ESPIPE) {
 | |
| 				break;
 | |
| 			}
 | |
| 			goto out;
 | |
| 		}
 | |
| 
 | |
| 		core->core_index = core_num++;
 | |
| 		bus->nr_cores++;
 | |
| 		other_core = bcma_find_core_reverse(bus, core->id.id);
 | |
| 		core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
 | |
| 		bcma_prepare_core(bus, core);
 | |
| 
 | |
| 		bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
 | |
| 			  core->core_index, bcma_device_name(&core->id),
 | |
| 			  core->id.manuf, core->id.id, core->id.rev,
 | |
| 			  core->id.class);
 | |
| 
 | |
| 		list_add_tail(&core->list, &bus->cores);
 | |
| 	}
 | |
| 
 | |
| 	err = 0;
 | |
| out:
 | |
| 	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
 | |
| 		iounmap(eromptr);
 | |
| 
 | |
| 	return err;
 | |
| }
 |