forked from mirrors/linux
889c2b7ec4
Initially, the meson clock directory only hosted 2 controllers drivers, for meson8 and gxbb. At the time, both used the same set of clock drivers so managing the dependencies was not a big concern. Since this ancient time, entropy did its job, controllers with different requirement and specific clock drivers have been added. Unfortunately, we did not do a great job at managing the dependencies between the controllers and the different clock drivers. Some drivers, such as clk-phase or vid-pll-div, are compiled even if they are useless on the target (meson8). As we are adding new controllers, we need to be able to pick a driver w/o pulling the whole thing. The patch aims to clean things up by: * providing a dedicated CONFIG_ for each clock drivers * allowing clock drivers to be compiled as a modules, if possible * stating explicitly which drivers are required by each controller. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20190201125841.26785-5-jbrunet@baylibre.com
123 lines
2.9 KiB
C
123 lines
2.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Amlogic Meson-AXG Clock Controller Driver
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*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*
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* Copyright (c) 2018 Amlogic, inc.
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* Author: Qiufang Dai <qiufang.dai@amlogic.com>
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* Author: Yixun Lan <yixun.lan@amlogic.com>
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*/
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#include <linux/platform_device.h>
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#include <linux/reset-controller.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_device.h>
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#include <linux/slab.h>
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#include "meson-aoclk.h"
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#include "clk-input.h"
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static int meson_aoclk_do_reset(struct reset_controller_dev *rcdev,
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unsigned long id)
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{
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struct meson_aoclk_reset_controller *rstc =
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container_of(rcdev, struct meson_aoclk_reset_controller, reset);
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return regmap_write(rstc->regmap, rstc->data->reset_reg,
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BIT(rstc->data->reset[id]));
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}
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static const struct reset_control_ops meson_aoclk_reset_ops = {
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.reset = meson_aoclk_do_reset,
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};
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static int meson_aoclkc_register_inputs(struct device *dev,
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struct meson_aoclk_data *data)
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{
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struct clk_hw *hw;
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char *str;
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int i;
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for (i = 0; i < data->num_inputs; i++) {
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const struct meson_aoclk_input *in = &data->inputs[i];
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str = kasprintf(GFP_KERNEL, "%s%s", data->input_prefix,
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in->name);
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if (!str)
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return -ENOMEM;
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hw = meson_clk_hw_register_input(dev, in->name, str, 0);
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kfree(str);
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if (IS_ERR(hw)) {
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if (!in->required && PTR_ERR(hw) == -ENOENT)
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continue;
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else if (PTR_ERR(hw) != -EPROBE_DEFER)
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dev_err(dev, "failed to register input %s\n",
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in->name);
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return PTR_ERR(hw);
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}
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}
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return 0;
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}
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int meson_aoclkc_probe(struct platform_device *pdev)
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{
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struct meson_aoclk_reset_controller *rstc;
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struct meson_aoclk_data *data;
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struct device *dev = &pdev->dev;
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struct regmap *regmap;
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int ret, clkid;
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data = (struct meson_aoclk_data *) of_device_get_match_data(dev);
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if (!data)
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return -ENODEV;
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rstc = devm_kzalloc(dev, sizeof(*rstc), GFP_KERNEL);
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if (!rstc)
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return -ENOMEM;
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regmap = syscon_node_to_regmap(of_get_parent(dev->of_node));
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if (IS_ERR(regmap)) {
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dev_err(dev, "failed to get regmap\n");
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return PTR_ERR(regmap);
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}
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ret = meson_aoclkc_register_inputs(dev, data);
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if (ret)
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return ret;
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/* Reset Controller */
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rstc->data = data;
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rstc->regmap = regmap;
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rstc->reset.ops = &meson_aoclk_reset_ops;
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rstc->reset.nr_resets = data->num_reset,
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rstc->reset.of_node = dev->of_node;
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ret = devm_reset_controller_register(dev, &rstc->reset);
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if (ret) {
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dev_err(dev, "failed to register reset controller\n");
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return ret;
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}
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/* Populate regmap */
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for (clkid = 0; clkid < data->num_clks; clkid++)
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data->clks[clkid]->map = regmap;
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/* Register all clks */
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for (clkid = 0; clkid < data->hw_data->num; clkid++) {
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if (!data->hw_data->hws[clkid])
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continue;
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ret = devm_clk_hw_register(dev, data->hw_data->hws[clkid]);
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if (ret) {
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dev_err(dev, "Clock registration failed\n");
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return ret;
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}
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}
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return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get,
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(void *) data->hw_data);
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}
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