Shaoyun Liu b0f6b8090e drm/amd/include: Update df 3.6 mask and shift definition ... The register field hsas been changed in df 3.6, update to correct setting Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2018-06-13 13:45:23 -05:00
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df_1_7_default.h
df_1_7_offset.h	drm/amdgpu: add new DF 1.7 register defs	2018-05-23 23:51:20 -05:00
df_1_7_sh_mask.h	drm/amdgpu: add new DF 1.7 register defs	2018-05-23 23:51:20 -05:00
df_3_6_default.h
df_3_6_offset.h
df_3_6_sh_mask.h	drm/amd/include: Update df 3.6 mask and shift definition	2018-06-13 13:45:23 -05:00