forked from mirrors/linux
		
	 2a79c034b5
			
		
	
	
		2a79c034b5
		
	
	
	
	
		
			
			The disassembler for debug dumps was missing some newer host1x opcodes. Add disassembly support for these. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Tested-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
		
			
				
	
	
		
			250 lines
		
	
	
	
		
			6.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			250 lines
		
	
	
	
		
			6.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2010 Google, Inc.
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|  * Author: Erik Gilling <konkers@android.com>
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|  *
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|  * Copyright (C) 2011-2013 NVIDIA Corporation
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|  *
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|  * This software is licensed under the terms of the GNU General Public
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|  * License version 2, as published by the Free Software Foundation, and
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|  * may be copied, distributed, and modified under those terms.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  */
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| 
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| #include "../dev.h"
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| #include "../debug.h"
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| #include "../cdma.h"
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| #include "../channel.h"
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| 
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| #define HOST1X_DEBUG_MAX_PAGE_OFFSET 102400
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| 
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| enum {
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| 	HOST1X_OPCODE_SETCLASS	= 0x00,
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| 	HOST1X_OPCODE_INCR	= 0x01,
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| 	HOST1X_OPCODE_NONINCR	= 0x02,
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| 	HOST1X_OPCODE_MASK	= 0x03,
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| 	HOST1X_OPCODE_IMM	= 0x04,
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| 	HOST1X_OPCODE_RESTART	= 0x05,
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| 	HOST1X_OPCODE_GATHER	= 0x06,
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| 	HOST1X_OPCODE_SETSTRMID = 0x07,
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| 	HOST1X_OPCODE_SETAPPID  = 0x08,
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| 	HOST1X_OPCODE_SETPYLD   = 0x09,
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| 	HOST1X_OPCODE_INCR_W    = 0x0a,
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| 	HOST1X_OPCODE_NONINCR_W = 0x0b,
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| 	HOST1X_OPCODE_GATHER_W  = 0x0c,
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| 	HOST1X_OPCODE_RESTART_W = 0x0d,
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| 	HOST1X_OPCODE_EXTEND	= 0x0e,
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| };
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| 
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| enum {
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| 	HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK	= 0x00,
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| 	HOST1X_OPCODE_EXTEND_RELEASE_MLOCK	= 0x01,
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| };
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| 
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| #define INVALID_PAYLOAD				0xffffffff
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| 
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| static unsigned int show_channel_command(struct output *o, u32 val,
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| 					 u32 *payload)
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| {
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| 	unsigned int mask, subop, num, opcode;
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| 
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| 	opcode = val >> 28;
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| 
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| 	switch (opcode) {
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| 	case HOST1X_OPCODE_SETCLASS:
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| 		mask = val & 0x3f;
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| 		if (mask) {
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| 			host1x_debug_cont(o, "SETCL(class=%03x, offset=%03x, mask=%02x, [",
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| 					    val >> 6 & 0x3ff,
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| 					    val >> 16 & 0xfff, mask);
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| 			return hweight8(mask);
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| 		}
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| 
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| 		host1x_debug_cont(o, "SETCL(class=%03x)\n", val >> 6 & 0x3ff);
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| 		return 0;
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| 
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| 	case HOST1X_OPCODE_INCR:
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| 		num = val & 0xffff;
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| 		host1x_debug_cont(o, "INCR(offset=%03x, [",
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| 				    val >> 16 & 0xfff);
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| 		if (!num)
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| 			host1x_debug_cont(o, "])\n");
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| 
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| 		return num;
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| 
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| 	case HOST1X_OPCODE_NONINCR:
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| 		num = val & 0xffff;
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| 		host1x_debug_cont(o, "NONINCR(offset=%03x, [",
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| 				    val >> 16 & 0xfff);
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| 		if (!num)
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| 			host1x_debug_cont(o, "])\n");
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| 
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| 		return num;
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| 
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| 	case HOST1X_OPCODE_MASK:
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| 		mask = val & 0xffff;
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| 		host1x_debug_cont(o, "MASK(offset=%03x, mask=%03x, [",
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| 				    val >> 16 & 0xfff, mask);
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| 		if (!mask)
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| 			host1x_debug_cont(o, "])\n");
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| 
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| 		return hweight16(mask);
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| 
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| 	case HOST1X_OPCODE_IMM:
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| 		host1x_debug_cont(o, "IMM(offset=%03x, data=%03x)\n",
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| 				    val >> 16 & 0xfff, val & 0xffff);
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| 		return 0;
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| 
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| 	case HOST1X_OPCODE_RESTART:
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| 		host1x_debug_cont(o, "RESTART(offset=%08x)\n", val << 4);
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| 		return 0;
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| 
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| 	case HOST1X_OPCODE_GATHER:
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| 		host1x_debug_cont(o, "GATHER(offset=%03x, insert=%d, type=%d, count=%04x, addr=[",
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| 				    val >> 16 & 0xfff, val >> 15 & 0x1,
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| 				    val >> 14 & 0x1, val & 0x3fff);
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| 		return 1;
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| 
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| #if HOST1X_HW >= 6
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| 	case HOST1X_OPCODE_SETSTRMID:
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| 		host1x_debug_cont(o, "SETSTRMID(offset=%06x)\n",
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| 				  val & 0x3fffff);
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| 		return 0;
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| 
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| 	case HOST1X_OPCODE_SETAPPID:
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| 		host1x_debug_cont(o, "SETAPPID(appid=%02x)\n", val & 0xff);
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| 		return 0;
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| 
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| 	case HOST1X_OPCODE_SETPYLD:
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| 		*payload = val & 0xffff;
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| 		host1x_debug_cont(o, "SETPYLD(data=%04x)\n", *payload);
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| 		return 0;
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| 
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| 	case HOST1X_OPCODE_INCR_W:
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| 	case HOST1X_OPCODE_NONINCR_W:
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| 		host1x_debug_cont(o, "%s(offset=%06x, ",
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| 				  opcode == HOST1X_OPCODE_INCR_W ?
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| 					"INCR_W" : "NONINCR_W",
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| 				  val & 0x3fffff);
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| 		if (*payload == 0) {
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| 			host1x_debug_cont(o, "[])\n");
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| 			return 0;
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| 		} else if (*payload == INVALID_PAYLOAD) {
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| 			host1x_debug_cont(o, "unknown)\n");
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| 			return 0;
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| 		} else {
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| 			host1x_debug_cont(o, "[");
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| 			return *payload;
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| 		}
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| 
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| 	case HOST1X_OPCODE_GATHER_W:
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| 		host1x_debug_cont(o, "GATHER_W(count=%04x, addr=[",
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| 				  val & 0x3fff);
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| 		return 2;
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| #endif
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| 
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| 	case HOST1X_OPCODE_EXTEND:
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| 		subop = val >> 24 & 0xf;
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| 		if (subop == HOST1X_OPCODE_EXTEND_ACQUIRE_MLOCK)
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| 			host1x_debug_cont(o, "ACQUIRE_MLOCK(index=%d)\n",
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| 					    val & 0xff);
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| 		else if (subop == HOST1X_OPCODE_EXTEND_RELEASE_MLOCK)
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| 			host1x_debug_cont(o, "RELEASE_MLOCK(index=%d)\n",
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| 					    val & 0xff);
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| 		else
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| 			host1x_debug_cont(o, "EXTEND_UNKNOWN(%08x)\n", val);
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| 		return 0;
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| 
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| 	default:
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| 		host1x_debug_cont(o, "UNKNOWN\n");
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| 		return 0;
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| 	}
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| }
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| 
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| static void show_gather(struct output *o, phys_addr_t phys_addr,
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| 			unsigned int words, struct host1x_cdma *cdma,
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| 			phys_addr_t pin_addr, u32 *map_addr)
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| {
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| 	/* Map dmaget cursor to corresponding mem handle */
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| 	u32 offset = phys_addr - pin_addr;
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| 	unsigned int data_count = 0, i;
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| 	u32 payload = INVALID_PAYLOAD;
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| 
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| 	/*
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| 	 * Sometimes we're given different hardware address to the same
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| 	 * page - in these cases the offset will get an invalid number and
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| 	 * we just have to bail out.
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| 	 */
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| 	if (offset > HOST1X_DEBUG_MAX_PAGE_OFFSET) {
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| 		host1x_debug_output(o, "[address mismatch]\n");
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| 		return;
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| 	}
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| 
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| 	for (i = 0; i < words; i++) {
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| 		u32 addr = phys_addr + i * 4;
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| 		u32 val = *(map_addr + offset / 4 + i);
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| 
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| 		if (!data_count) {
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| 			host1x_debug_output(o, "%08x: %08x: ", addr, val);
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| 			data_count = show_channel_command(o, val, &payload);
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| 		} else {
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| 			host1x_debug_cont(o, "%08x%s", val,
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| 					    data_count > 1 ? ", " : "])\n");
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| 			data_count--;
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| 		}
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| 	}
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| }
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| 
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| static void show_channel_gathers(struct output *o, struct host1x_cdma *cdma)
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| {
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| 	struct host1x_job *job;
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| 
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| 	list_for_each_entry(job, &cdma->sync_queue, list) {
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| 		unsigned int i;
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| 
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| 		host1x_debug_output(o, "\n%p: JOB, syncpt_id=%d, syncpt_val=%d, first_get=%08x, timeout=%d num_slots=%d, num_handles=%d\n",
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| 				    job, job->syncpt_id, job->syncpt_end,
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| 				    job->first_get, job->timeout,
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| 				    job->num_slots, job->num_unpins);
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| 
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| 		for (i = 0; i < job->num_gathers; i++) {
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| 			struct host1x_job_gather *g = &job->gathers[i];
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| 			u32 *mapped;
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| 
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| 			if (job->gather_copy_mapped)
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| 				mapped = (u32 *)job->gather_copy_mapped;
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| 			else
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| 				mapped = host1x_bo_mmap(g->bo);
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| 
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| 			if (!mapped) {
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| 				host1x_debug_output(o, "[could not mmap]\n");
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| 				continue;
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| 			}
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| 
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| 			host1x_debug_output(o, "    GATHER at %pad+%#x, %d words\n",
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| 					    &g->base, g->offset, g->words);
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| 
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| 			show_gather(o, g->base + g->offset, g->words, cdma,
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| 				    g->base, mapped);
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| 
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| 			if (!job->gather_copy_mapped)
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| 				host1x_bo_munmap(g->bo, mapped);
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| 		}
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| 	}
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| }
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| 
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| #if HOST1X_HW >= 6
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| #include "debug_hw_1x06.c"
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| #else
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| #include "debug_hw_1x01.c"
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| #endif
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| 
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| static const struct host1x_debug_ops host1x_debug_ops = {
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| 	.show_channel_cdma = host1x_debug_show_channel_cdma,
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| 	.show_channel_fifo = host1x_debug_show_channel_fifo,
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| 	.show_mlocks = host1x_debug_show_mlocks,
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| };
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