forked from mirrors/linux
		
	 ac1bdbf22b
			
		
	
	
		ac1bdbf22b
		
	
	
	
	
		
			
			The host1x hardware found on Tegra194 is mostly backwards compatible with the version found on Tegra186, with the notable exceptions of the increased number of syncpoints and mlocks. In addition, some rarely used features such as syncpoint wait bases were dropped and some registers had to move around to accomodate the increased number of syncpoints. Signed-off-by: Thierry Reding <treding@nvidia.com>
		
			
				
	
	
		
			46 lines
		
	
	
	
		
			2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			46 lines
		
	
	
	
		
			2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2018 NVIDIA Corporation.
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|  *
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|  * This program is free software; you can redistribute it and/or modify it
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|  * under the terms and conditions of the GNU General Public License,
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|  * version 2, as published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope it will be useful, but WITHOUT
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|  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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|  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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|  * more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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|  *
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|  */
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| 
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| #define HOST1X_CHANNEL_DMASTART				0x0000
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| #define HOST1X_CHANNEL_DMASTART_HI			0x0004
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| #define HOST1X_CHANNEL_DMAPUT				0x0008
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| #define HOST1X_CHANNEL_DMAPUT_HI			0x000c
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| #define HOST1X_CHANNEL_DMAGET				0x0010
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| #define HOST1X_CHANNEL_DMAGET_HI			0x0014
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| #define HOST1X_CHANNEL_DMAEND				0x0018
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| #define HOST1X_CHANNEL_DMAEND_HI			0x001c
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| #define HOST1X_CHANNEL_DMACTRL				0x0020
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| #define HOST1X_CHANNEL_DMACTRL_DMASTOP			BIT(0)
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| #define HOST1X_CHANNEL_DMACTRL_DMAGETRST		BIT(1)
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| #define HOST1X_CHANNEL_DMACTRL_DMAINITGET		BIT(2)
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| #define HOST1X_CHANNEL_CMDFIFO_STAT			0x0024
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| #define HOST1X_CHANNEL_CMDFIFO_STAT_EMPTY		BIT(13)
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| #define HOST1X_CHANNEL_CMDFIFO_RDATA			0x0028
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| #define HOST1X_CHANNEL_CMDP_OFFSET			0x0030
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| #define HOST1X_CHANNEL_CMDP_CLASS			0x0034
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| #define HOST1X_CHANNEL_CHANNELSTAT			0x0038
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| #define HOST1X_CHANNEL_CMDPROC_STOP			0x0048
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| #define HOST1X_CHANNEL_TEARDOWN				0x004c
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| 
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| #define HOST1X_SYNC_SYNCPT_CPU_INCR(x)			(0x6400 + 4 * (x))
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| #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(x)	(0x6464 + 4 * (x))
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| #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(x)	(0x652c + 4 * (x))
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| #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(x)	(0x6590 + 4 * (x))
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| #define HOST1X_SYNC_SYNCPT(x)				(0x8080 + 4 * (x))
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| #define HOST1X_SYNC_SYNCPT_INT_THRESH(x)		(0x8d00 + 4 * (x))
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| #define HOST1X_SYNC_SYNCPT_CH_APP(x)			(0xa604 + 4 * (x))
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| #define HOST1X_SYNC_SYNCPT_CH_APP_CH(v)			(((v) & 0x3f) << 8)
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