forked from mirrors/linux
09c434b8a0
Add SPDX license identifiers to all files which:
- Have no license information of any form
- Have MODULE_LICENCE("GPL*") inside which was used in the initial
scan/conversion to ignore the file
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
250 lines
6.5 KiB
C
250 lines
6.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 1996 Linus Torvalds & author (see below)
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*/
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/*
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* ALI M14xx chipset EIDE controller
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*
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* Works for ALI M1439/1443/1445/1487/1489 chipsets.
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*
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* Adapted from code developed by derekn@vw.ece.cmu.edu. -ml
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* Derek's notes follow:
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*
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* I think the code should be pretty understandable,
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* but I'll be happy to (try to) answer questions.
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*
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* The critical part is in the setupDrive function. The initRegisters
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* function doesn't seem to be necessary, but the DOS driver does it, so
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* I threw it in.
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*
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* I've only tested this on my system, which only has one disk. I posted
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* it to comp.sys.linux.hardware, so maybe some other people will try it
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* out.
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*
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* Derek Noonburg (derekn@ece.cmu.edu)
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* 95-sep-26
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*
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* Update 96-jul-13:
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*
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* I've since upgraded to two disks and a CD-ROM, with no trouble, and
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* I've also heard from several others who have used it successfully.
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* This driver appears to work with both the 1443/1445 and the 1487/1489
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* chipsets. I've added support for PIO mode 4 for the 1487. This
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* seems to work just fine on the 1443 also, although I'm not sure it's
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* advertised as supporting mode 4. (I've been running a WDC AC21200 in
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* mode 4 for a while now with no trouble.) -Derek
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/ioport.h>
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#include <linux/blkdev.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#define DRV_NAME "ali14xx"
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/* port addresses for auto-detection */
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#define ALI_NUM_PORTS 4
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static const int ports[ALI_NUM_PORTS] __initconst =
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{ 0x074, 0x0f4, 0x034, 0x0e4 };
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/* register initialization data */
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typedef struct { u8 reg, data; } RegInitializer;
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static const RegInitializer initData[] __initconst = {
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{0x01, 0x0f}, {0x02, 0x00}, {0x03, 0x00}, {0x04, 0x00},
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{0x05, 0x00}, {0x06, 0x00}, {0x07, 0x2b}, {0x0a, 0x0f},
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{0x25, 0x00}, {0x26, 0x00}, {0x27, 0x00}, {0x28, 0x00},
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{0x29, 0x00}, {0x2a, 0x00}, {0x2f, 0x00}, {0x2b, 0x00},
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{0x2c, 0x00}, {0x2d, 0x00}, {0x2e, 0x00}, {0x30, 0x00},
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{0x31, 0x00}, {0x32, 0x00}, {0x33, 0x00}, {0x34, 0xff},
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{0x35, 0x03}, {0x00, 0x00}
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};
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/* timing parameter registers for each drive */
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static struct { u8 reg1, reg2, reg3, reg4; } regTab[4] = {
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{0x03, 0x26, 0x04, 0x27}, /* drive 0 */
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{0x05, 0x28, 0x06, 0x29}, /* drive 1 */
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{0x2b, 0x30, 0x2c, 0x31}, /* drive 2 */
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{0x2d, 0x32, 0x2e, 0x33}, /* drive 3 */
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};
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static int basePort; /* base port address */
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static int regPort; /* port for register number */
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static int dataPort; /* port for register data */
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static u8 regOn; /* output to base port to access registers */
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static u8 regOff; /* output to base port to close registers */
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/*------------------------------------------------------------------------*/
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/*
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* Read a controller register.
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*/
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static inline u8 inReg(u8 reg)
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{
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outb_p(reg, regPort);
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return inb(dataPort);
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}
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/*
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* Write a controller register.
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*/
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static void outReg(u8 data, u8 reg)
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{
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outb_p(reg, regPort);
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outb_p(data, dataPort);
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}
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static DEFINE_SPINLOCK(ali14xx_lock);
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/*
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* Set PIO mode for the specified drive.
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* This function computes timing parameters
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* and sets controller registers accordingly.
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*/
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static void ali14xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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int driveNum;
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int time1, time2;
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u8 param1, param2, param3, param4;
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unsigned long flags;
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int bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
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const u8 pio = drive->pio_mode - XFER_PIO_0;
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struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
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/* calculate timing, according to PIO mode */
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time1 = ide_pio_cycle_time(drive, pio);
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time2 = t->active;
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param3 = param1 = (time2 * bus_speed + 999) / 1000;
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param4 = param2 = (time1 * bus_speed + 999) / 1000 - param1;
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if (pio < 3) {
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param3 += 8;
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param4 += 8;
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}
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printk(KERN_DEBUG "%s: PIO mode%d, t1=%dns, t2=%dns, cycles = %d+%d, %d+%d\n",
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drive->name, pio, time1, time2, param1, param2, param3, param4);
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/* stuff timing parameters into controller registers */
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driveNum = (drive->hwif->index << 1) + (drive->dn & 1);
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spin_lock_irqsave(&ali14xx_lock, flags);
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outb_p(regOn, basePort);
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outReg(param1, regTab[driveNum].reg1);
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outReg(param2, regTab[driveNum].reg2);
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outReg(param3, regTab[driveNum].reg3);
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outReg(param4, regTab[driveNum].reg4);
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outb_p(regOff, basePort);
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spin_unlock_irqrestore(&ali14xx_lock, flags);
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}
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/*
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* Auto-detect the IDE controller port.
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*/
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static int __init findPort(void)
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{
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int i;
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u8 t;
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unsigned long flags;
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local_irq_save(flags);
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for (i = 0; i < ALI_NUM_PORTS; ++i) {
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basePort = ports[i];
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regOff = inb(basePort);
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for (regOn = 0x30; regOn <= 0x33; ++regOn) {
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outb_p(regOn, basePort);
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if (inb(basePort) == regOn) {
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regPort = basePort + 4;
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dataPort = basePort + 8;
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t = inReg(0) & 0xf0;
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outb_p(regOff, basePort);
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local_irq_restore(flags);
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if (t != 0x50)
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return 0;
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return 1; /* success */
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}
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}
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outb_p(regOff, basePort);
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}
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local_irq_restore(flags);
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return 0;
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}
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/*
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* Initialize controller registers with default values.
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*/
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static int __init initRegisters(void)
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{
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const RegInitializer *p;
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u8 t;
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unsigned long flags;
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local_irq_save(flags);
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outb_p(regOn, basePort);
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for (p = initData; p->reg != 0; ++p)
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outReg(p->data, p->reg);
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outb_p(0x01, regPort);
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t = inb(regPort) & 0x01;
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outb_p(regOff, basePort);
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local_irq_restore(flags);
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return t;
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}
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static const struct ide_port_ops ali14xx_port_ops = {
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.set_pio_mode = ali14xx_set_pio_mode,
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};
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static const struct ide_port_info ali14xx_port_info = {
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.name = DRV_NAME,
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.chipset = ide_ali14xx,
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.port_ops = &ali14xx_port_ops,
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.host_flags = IDE_HFLAG_NO_DMA,
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.pio_mask = ATA_PIO4,
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};
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static int __init ali14xx_probe(void)
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{
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printk(KERN_DEBUG "ali14xx: base=0x%03x, regOn=0x%02x.\n",
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basePort, regOn);
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/* initialize controller registers */
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if (!initRegisters()) {
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printk(KERN_ERR "ali14xx: Chip initialization failed.\n");
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return 1;
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}
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return ide_legacy_device_add(&ali14xx_port_info, 0);
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}
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static bool probe_ali14xx;
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module_param_named(probe, probe_ali14xx, bool, 0);
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MODULE_PARM_DESC(probe, "probe for ALI M14xx chipsets");
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static int __init ali14xx_init(void)
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{
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if (probe_ali14xx == 0)
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goto out;
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/* auto-detect IDE controller port */
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if (findPort()) {
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if (ali14xx_probe())
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return -ENODEV;
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return 0;
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}
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printk(KERN_ERR "ali14xx: not found.\n");
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out:
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return -ENODEV;
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}
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module_init(ali14xx_init);
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MODULE_AUTHOR("see local file");
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MODULE_DESCRIPTION("support of ALI 14XX IDE chipsets");
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MODULE_LICENSE("GPL");
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