forked from mirrors/linux
		
	 1c4f88b7f1
			
		
	
	
		1c4f88b7f1
		
	
	
	
	
		
			
			This patch enables the current SVA (Shared Virtual Address) implementation to work in the scalable mode. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Sanjay Kumar <sanjay.k.kumar@intel.com> Signed-off-by: Liu Yi L <yi.l.liu@intel.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Ashok Raj <ashok.raj@intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
		
			
				
	
	
		
			73 lines
		
	
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			73 lines
		
	
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0 */
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| /*
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|  * intel-pasid.h - PASID idr, table and entry header
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|  *
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|  * Copyright (C) 2018 Intel Corporation
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|  *
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|  * Author: Lu Baolu <baolu.lu@linux.intel.com>
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|  */
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| 
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| #ifndef __INTEL_PASID_H
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| #define __INTEL_PASID_H
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| 
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| #define PASID_RID2PASID			0x0
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| #define PASID_MIN			0x1
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| #define PASID_MAX			0x100000
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| #define PASID_PTE_MASK			0x3F
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| #define PASID_PTE_PRESENT		1
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| #define PDE_PFN_MASK			PAGE_MASK
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| #define PASID_PDE_SHIFT			6
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| #define MAX_NR_PASID_BITS		20
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| 
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| /*
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|  * Domain ID reserved for pasid entries programmed for first-level
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|  * only and pass-through transfer modes.
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|  */
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| #define FLPT_DEFAULT_DID		1
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| 
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| /*
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|  * The SUPERVISOR_MODE flag indicates a first level translation which
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|  * can be used for access to kernel addresses. It is valid only for
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|  * access to the kernel's static 1:1 mapping of physical memory — not
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|  * to vmalloc or even module mappings.
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|  */
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| #define PASID_FLAG_SUPERVISOR_MODE	BIT(0)
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| 
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| struct pasid_dir_entry {
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| 	u64 val;
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| };
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| 
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| struct pasid_entry {
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| 	u64 val[8];
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| };
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| 
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| /* The representative of a PASID table */
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| struct pasid_table {
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| 	void			*table;		/* pasid table pointer */
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| 	int			order;		/* page order of pasid table */
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| 	int			max_pasid;	/* max pasid */
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| 	struct list_head	dev;		/* device list */
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| };
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| 
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| extern u32 intel_pasid_max_id;
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| int intel_pasid_alloc_id(void *ptr, int start, int end, gfp_t gfp);
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| void intel_pasid_free_id(int pasid);
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| void *intel_pasid_lookup_id(int pasid);
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| int intel_pasid_alloc_table(struct device *dev);
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| void intel_pasid_free_table(struct device *dev);
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| struct pasid_table *intel_pasid_get_table(struct device *dev);
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| int intel_pasid_get_dev_max_id(struct device *dev);
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| struct pasid_entry *intel_pasid_get_entry(struct device *dev, int pasid);
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| int intel_pasid_setup_first_level(struct intel_iommu *iommu,
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| 				  struct device *dev, pgd_t *pgd,
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| 				  int pasid, u16 did, int flags);
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| int intel_pasid_setup_second_level(struct intel_iommu *iommu,
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| 				   struct dmar_domain *domain,
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| 				   struct device *dev, int pasid);
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| int intel_pasid_setup_pass_through(struct intel_iommu *iommu,
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| 				   struct dmar_domain *domain,
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| 				   struct device *dev, int pasid);
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| void intel_pasid_tear_down_entry(struct intel_iommu *iommu,
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| 				 struct device *dev, int pasid);
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| 
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| #endif /* __INTEL_PASID_H */
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