forked from mirrors/linux
3e8c4d31f8
This cleans up the directory a bit, now that we have several other platforms using platform-specific sub-directories. Compile-tested with ARCH=x86 defconfig and the drivers explicitly enabled with menuconfig. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Zhang Rui <rui.zhang@intel.com>
299 lines
7 KiB
C
299 lines
7 KiB
C
/*
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* Intel Broxton PMIC thermal driver
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*
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* Copyright (C) 2016 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <linux/thermal.h>
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#include <linux/platform_device.h>
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#include <linux/sched.h>
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#include <linux/mfd/intel_soc_pmic.h>
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#define BXTWC_THRM0IRQ 0x4E04
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#define BXTWC_THRM1IRQ 0x4E05
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#define BXTWC_THRM2IRQ 0x4E06
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#define BXTWC_MTHRM0IRQ 0x4E12
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#define BXTWC_MTHRM1IRQ 0x4E13
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#define BXTWC_MTHRM2IRQ 0x4E14
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#define BXTWC_STHRM0IRQ 0x4F19
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#define BXTWC_STHRM1IRQ 0x4F1A
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#define BXTWC_STHRM2IRQ 0x4F1B
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struct trip_config_map {
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u16 irq_reg;
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u16 irq_en;
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u16 evt_stat;
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u8 irq_mask;
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u8 irq_en_mask;
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u8 evt_mask;
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u8 trip_num;
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};
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struct thermal_irq_map {
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char handle[20];
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int num_trips;
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const struct trip_config_map *trip_config;
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};
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struct pmic_thermal_data {
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const struct thermal_irq_map *maps;
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int num_maps;
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};
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static const struct trip_config_map bxtwc_str0_trip_config[] = {
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{
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.irq_reg = BXTWC_THRM0IRQ,
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.irq_mask = 0x01,
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.irq_en = BXTWC_MTHRM0IRQ,
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.irq_en_mask = 0x01,
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.evt_stat = BXTWC_STHRM0IRQ,
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.evt_mask = 0x01,
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.trip_num = 0
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},
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{
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.irq_reg = BXTWC_THRM0IRQ,
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.irq_mask = 0x10,
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.irq_en = BXTWC_MTHRM0IRQ,
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.irq_en_mask = 0x10,
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.evt_stat = BXTWC_STHRM0IRQ,
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.evt_mask = 0x10,
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.trip_num = 1
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}
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};
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static const struct trip_config_map bxtwc_str1_trip_config[] = {
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{
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.irq_reg = BXTWC_THRM0IRQ,
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.irq_mask = 0x02,
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.irq_en = BXTWC_MTHRM0IRQ,
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.irq_en_mask = 0x02,
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.evt_stat = BXTWC_STHRM0IRQ,
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.evt_mask = 0x02,
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.trip_num = 0
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},
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{
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.irq_reg = BXTWC_THRM0IRQ,
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.irq_mask = 0x20,
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.irq_en = BXTWC_MTHRM0IRQ,
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.irq_en_mask = 0x20,
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.evt_stat = BXTWC_STHRM0IRQ,
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.evt_mask = 0x20,
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.trip_num = 1
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},
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};
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static const struct trip_config_map bxtwc_str2_trip_config[] = {
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{
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.irq_reg = BXTWC_THRM0IRQ,
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.irq_mask = 0x04,
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.irq_en = BXTWC_MTHRM0IRQ,
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.irq_en_mask = 0x04,
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.evt_stat = BXTWC_STHRM0IRQ,
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.evt_mask = 0x04,
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.trip_num = 0
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},
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{
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.irq_reg = BXTWC_THRM0IRQ,
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.irq_mask = 0x40,
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.irq_en = BXTWC_MTHRM0IRQ,
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.irq_en_mask = 0x40,
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.evt_stat = BXTWC_STHRM0IRQ,
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.evt_mask = 0x40,
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.trip_num = 1
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},
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};
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static const struct trip_config_map bxtwc_str3_trip_config[] = {
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{
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.irq_reg = BXTWC_THRM2IRQ,
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.irq_mask = 0x10,
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.irq_en = BXTWC_MTHRM2IRQ,
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.irq_en_mask = 0x10,
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.evt_stat = BXTWC_STHRM2IRQ,
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.evt_mask = 0x10,
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.trip_num = 0
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},
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};
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static const struct thermal_irq_map bxtwc_thermal_irq_map[] = {
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{
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.handle = "STR0",
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.trip_config = bxtwc_str0_trip_config,
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.num_trips = ARRAY_SIZE(bxtwc_str0_trip_config),
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},
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{
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.handle = "STR1",
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.trip_config = bxtwc_str1_trip_config,
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.num_trips = ARRAY_SIZE(bxtwc_str1_trip_config),
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},
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{
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.handle = "STR2",
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.trip_config = bxtwc_str2_trip_config,
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.num_trips = ARRAY_SIZE(bxtwc_str2_trip_config),
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},
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{
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.handle = "STR3",
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.trip_config = bxtwc_str3_trip_config,
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.num_trips = ARRAY_SIZE(bxtwc_str3_trip_config),
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},
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};
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static const struct pmic_thermal_data bxtwc_thermal_data = {
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.maps = bxtwc_thermal_irq_map,
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.num_maps = ARRAY_SIZE(bxtwc_thermal_irq_map),
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};
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static irqreturn_t pmic_thermal_irq_handler(int irq, void *data)
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{
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struct platform_device *pdev = data;
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struct thermal_zone_device *tzd;
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struct pmic_thermal_data *td;
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struct intel_soc_pmic *pmic;
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struct regmap *regmap;
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u8 reg_val, mask, irq_stat;
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u16 reg, evt_stat_reg;
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int i, j, ret;
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pmic = dev_get_drvdata(pdev->dev.parent);
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regmap = pmic->regmap;
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td = (struct pmic_thermal_data *)
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platform_get_device_id(pdev)->driver_data;
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/* Resolve thermal irqs */
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for (i = 0; i < td->num_maps; i++) {
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for (j = 0; j < td->maps[i].num_trips; j++) {
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reg = td->maps[i].trip_config[j].irq_reg;
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mask = td->maps[i].trip_config[j].irq_mask;
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/*
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* Read the irq register to resolve whether the
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* interrupt was triggered for this sensor
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*/
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if (regmap_read(regmap, reg, &ret))
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return IRQ_HANDLED;
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reg_val = (u8)ret;
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irq_stat = ((u8)ret & mask);
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if (!irq_stat)
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continue;
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/*
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* Read the status register to find out what
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* event occurred i.e a high or a low
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*/
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evt_stat_reg = td->maps[i].trip_config[j].evt_stat;
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if (regmap_read(regmap, evt_stat_reg, &ret))
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return IRQ_HANDLED;
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tzd = thermal_zone_get_zone_by_name(td->maps[i].handle);
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if (!IS_ERR(tzd))
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thermal_zone_device_update(tzd,
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THERMAL_EVENT_UNSPECIFIED);
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/* Clear the appropriate irq */
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regmap_write(regmap, reg, reg_val & mask);
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}
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}
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return IRQ_HANDLED;
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}
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static int pmic_thermal_probe(struct platform_device *pdev)
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{
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struct regmap_irq_chip_data *regmap_irq_chip;
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struct pmic_thermal_data *thermal_data;
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int ret, irq, virq, i, j, pmic_irq_count;
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struct intel_soc_pmic *pmic;
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struct regmap *regmap;
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struct device *dev;
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u16 reg;
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u8 mask;
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dev = &pdev->dev;
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pmic = dev_get_drvdata(pdev->dev.parent);
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if (!pmic) {
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dev_err(dev, "Failed to get struct intel_soc_pmic pointer\n");
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return -ENODEV;
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}
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thermal_data = (struct pmic_thermal_data *)
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platform_get_device_id(pdev)->driver_data;
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if (!thermal_data) {
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dev_err(dev, "No thermal data initialized!!\n");
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return -ENODEV;
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}
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regmap = pmic->regmap;
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regmap_irq_chip = pmic->irq_chip_data;
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pmic_irq_count = 0;
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while ((irq = platform_get_irq(pdev, pmic_irq_count)) != -ENXIO) {
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virq = regmap_irq_get_virq(regmap_irq_chip, irq);
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if (virq < 0) {
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dev_err(dev, "failed to get virq by irq %d\n", irq);
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return virq;
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}
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ret = devm_request_threaded_irq(&pdev->dev, virq,
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NULL, pmic_thermal_irq_handler,
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IRQF_ONESHOT, "pmic_thermal", pdev);
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if (ret) {
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dev_err(dev, "request irq(%d) failed: %d\n", virq, ret);
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return ret;
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}
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pmic_irq_count++;
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}
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/* Enable thermal interrupts */
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for (i = 0; i < thermal_data->num_maps; i++) {
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for (j = 0; j < thermal_data->maps[i].num_trips; j++) {
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reg = thermal_data->maps[i].trip_config[j].irq_en;
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mask = thermal_data->maps[i].trip_config[j].irq_en_mask;
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ret = regmap_update_bits(regmap, reg, mask, 0x00);
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if (ret)
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return ret;
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}
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}
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return 0;
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}
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static const struct platform_device_id pmic_thermal_id_table[] = {
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{
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.name = "bxt_wcove_thermal",
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.driver_data = (kernel_ulong_t)&bxtwc_thermal_data,
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},
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{},
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};
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static struct platform_driver pmic_thermal_driver = {
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.probe = pmic_thermal_probe,
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.driver = {
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.name = "pmic_thermal",
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},
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.id_table = pmic_thermal_id_table,
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};
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MODULE_DEVICE_TABLE(platform, pmic_thermal_id_table);
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module_platform_driver(pmic_thermal_driver);
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MODULE_AUTHOR("Yegnesh S Iyer <yegnesh.s.iyer@intel.com>");
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MODULE_DESCRIPTION("Intel Broxton PMIC Thermal Driver");
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MODULE_LICENSE("GPL v2");
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