forked from mirrors/linux
		
	 42986fb811
			
		
	
	
		42986fb811
		
	
	
	
	
		
			
			This patch adds a driver for Cadence RTC controller. It can be enabled with RTC_DRV_CADENCE Kconfig option. It supports waking system from sleep modes. Signed-off-by: Jan Kotas <jank@cadence.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
		
			
				
	
	
		
			423 lines
		
	
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			423 lines
		
	
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| 
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| /*
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|  * Copyright 2019 Cadence
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|  *
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|  * Authors:
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|  *  Jan Kotas <jank@cadence.com>
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|  */
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| 
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| #include <linux/module.h>
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| #include <linux/platform_device.h>
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| #include <linux/of.h>
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| #include <linux/io.h>
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| #include <linux/rtc.h>
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| #include <linux/clk.h>
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| #include <linux/bcd.h>
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| #include <linux/bitfield.h>
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| #include <linux/interrupt.h>
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| #include <linux/pm_wakeirq.h>
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| 
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| /* Registers */
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| #define CDNS_RTC_CTLR		0x00
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| #define CDNS_RTC_HMR		0x04
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| #define CDNS_RTC_TIMR		0x08
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| #define CDNS_RTC_CALR		0x0C
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| #define CDNS_RTC_TIMAR		0x10
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| #define CDNS_RTC_CALAR		0x14
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| #define CDNS_RTC_AENR		0x18
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| #define CDNS_RTC_EFLR		0x1C
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| #define CDNS_RTC_IENR		0x20
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| #define CDNS_RTC_IDISR		0x24
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| #define CDNS_RTC_IMSKR		0x28
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| #define CDNS_RTC_STSR		0x2C
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| #define CDNS_RTC_KRTCR		0x30
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| 
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| /* Control */
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| #define CDNS_RTC_CTLR_TIME	BIT(0)
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| #define CDNS_RTC_CTLR_CAL	BIT(1)
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| #define CDNS_RTC_CTLR_TIME_CAL	(CDNS_RTC_CTLR_TIME | CDNS_RTC_CTLR_CAL)
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| 
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| /* Status */
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| #define CDNS_RTC_STSR_VT	BIT(0)
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| #define CDNS_RTC_STSR_VC	BIT(1)
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| #define CDNS_RTC_STSR_VTA	BIT(2)
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| #define CDNS_RTC_STSR_VCA	BIT(3)
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| #define CDNS_RTC_STSR_VT_VC	(CDNS_RTC_STSR_VT | CDNS_RTC_STSR_VC)
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| #define CDNS_RTC_STSR_VTA_VCA	(CDNS_RTC_STSR_VTA | CDNS_RTC_STSR_VCA)
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| 
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| /* Keep RTC */
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| #define CDNS_RTC_KRTCR_KRTC	BIT(0)
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| 
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| /* Alarm, Event, Interrupt */
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| #define CDNS_RTC_AEI_HOS	BIT(0)
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| #define CDNS_RTC_AEI_SEC	BIT(1)
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| #define CDNS_RTC_AEI_MIN	BIT(2)
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| #define CDNS_RTC_AEI_HOUR	BIT(3)
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| #define CDNS_RTC_AEI_DATE	BIT(4)
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| #define CDNS_RTC_AEI_MNTH	BIT(5)
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| #define CDNS_RTC_AEI_ALRM	BIT(6)
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| 
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| /* Time */
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| #define CDNS_RTC_TIME_H		GENMASK(7, 0)
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| #define CDNS_RTC_TIME_S		GENMASK(14, 8)
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| #define CDNS_RTC_TIME_M		GENMASK(22, 16)
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| #define CDNS_RTC_TIME_HR	GENMASK(29, 24)
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| #define CDNS_RTC_TIME_PM	BIT(30)
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| #define CDNS_RTC_TIME_CH	BIT(31)
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| 
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| /* Calendar */
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| #define CDNS_RTC_CAL_DAY	GENMASK(2, 0)
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| #define CDNS_RTC_CAL_M		GENMASK(7, 3)
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| #define CDNS_RTC_CAL_D		GENMASK(13, 8)
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| #define CDNS_RTC_CAL_Y		GENMASK(23, 16)
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| #define CDNS_RTC_CAL_C		GENMASK(29, 24)
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| #define CDNS_RTC_CAL_CH		BIT(31)
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| 
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| #define CDNS_RTC_MAX_REGS_TRIES	3
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| 
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| struct cdns_rtc {
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| 	struct rtc_device *rtc_dev;
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| 	struct clk *pclk;
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| 	struct clk *ref_clk;
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| 	void __iomem *regs;
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| 	int irq;
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| };
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| 
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| static void cdns_rtc_set_enabled(struct cdns_rtc *crtc, bool enabled)
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| {
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| 	u32 reg = enabled ? 0x0 : CDNS_RTC_CTLR_TIME_CAL;
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| 
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| 	writel(reg, crtc->regs + CDNS_RTC_CTLR);
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| }
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| 
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| static bool cdns_rtc_get_enabled(struct cdns_rtc *crtc)
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| {
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| 	return !(readl(crtc->regs + CDNS_RTC_CTLR) & CDNS_RTC_CTLR_TIME_CAL);
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| }
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| 
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| static irqreturn_t cdns_rtc_irq_handler(int irq, void *id)
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| {
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| 	struct device *dev = id;
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| 	struct cdns_rtc *crtc = dev_get_drvdata(dev);
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| 
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| 	/* Reading the register clears it */
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| 	if (!(readl(crtc->regs + CDNS_RTC_EFLR) & CDNS_RTC_AEI_ALRM))
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| 		return IRQ_NONE;
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| 
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| 	rtc_update_irq(crtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
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| 	return IRQ_HANDLED;
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| }
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| 
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| static u32 cdns_rtc_time2reg(struct rtc_time *tm)
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| {
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| 	return FIELD_PREP(CDNS_RTC_TIME_S,  bin2bcd(tm->tm_sec))
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| 	     | FIELD_PREP(CDNS_RTC_TIME_M,  bin2bcd(tm->tm_min))
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| 	     | FIELD_PREP(CDNS_RTC_TIME_HR, bin2bcd(tm->tm_hour));
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| }
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| 
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| static void cdns_rtc_reg2time(u32 reg, struct rtc_time *tm)
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| {
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| 	tm->tm_sec  = bcd2bin(FIELD_GET(CDNS_RTC_TIME_S, reg));
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| 	tm->tm_min  = bcd2bin(FIELD_GET(CDNS_RTC_TIME_M, reg));
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| 	tm->tm_hour = bcd2bin(FIELD_GET(CDNS_RTC_TIME_HR, reg));
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| }
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| 
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| static int cdns_rtc_read_time(struct device *dev, struct rtc_time *tm)
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| {
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| 	struct cdns_rtc *crtc = dev_get_drvdata(dev);
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| 	u32 reg;
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| 
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| 	/* If the RTC is disabled, assume the values are invalid */
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| 	if (!cdns_rtc_get_enabled(crtc))
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| 		return -EINVAL;
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| 
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| 	cdns_rtc_set_enabled(crtc, false);
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| 
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| 	reg = readl(crtc->regs + CDNS_RTC_TIMR);
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| 	cdns_rtc_reg2time(reg, tm);
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| 
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| 	reg = readl(crtc->regs + CDNS_RTC_CALR);
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| 	tm->tm_mday = bcd2bin(FIELD_GET(CDNS_RTC_CAL_D, reg));
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| 	tm->tm_mon  = bcd2bin(FIELD_GET(CDNS_RTC_CAL_M, reg)) - 1;
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| 	tm->tm_year = bcd2bin(FIELD_GET(CDNS_RTC_CAL_Y, reg))
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| 		    + bcd2bin(FIELD_GET(CDNS_RTC_CAL_C, reg)) * 100 - 1900;
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| 	tm->tm_wday = bcd2bin(FIELD_GET(CDNS_RTC_CAL_DAY, reg)) - 1;
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| 
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| 	cdns_rtc_set_enabled(crtc, true);
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| 	return 0;
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| }
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| 
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| static int cdns_rtc_set_time(struct device *dev, struct rtc_time *tm)
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| {
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| 	struct cdns_rtc *crtc = dev_get_drvdata(dev);
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| 	u32 timr, calr, stsr;
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| 	int ret = -EIO;
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| 	int year = tm->tm_year + 1900;
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| 	int tries;
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| 
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| 	cdns_rtc_set_enabled(crtc, false);
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| 
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| 	timr = cdns_rtc_time2reg(tm);
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| 
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| 	calr = FIELD_PREP(CDNS_RTC_CAL_D, bin2bcd(tm->tm_mday))
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| 	     | FIELD_PREP(CDNS_RTC_CAL_M, bin2bcd(tm->tm_mon + 1))
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| 	     | FIELD_PREP(CDNS_RTC_CAL_Y, bin2bcd(year % 100))
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| 	     | FIELD_PREP(CDNS_RTC_CAL_C, bin2bcd(year / 100))
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| 	     | FIELD_PREP(CDNS_RTC_CAL_DAY, tm->tm_wday + 1);
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| 
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| 	/* Update registers, check valid flags */
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| 	for (tries = 0; tries < CDNS_RTC_MAX_REGS_TRIES; tries++) {
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| 		writel(timr, crtc->regs + CDNS_RTC_TIMR);
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| 		writel(calr, crtc->regs + CDNS_RTC_CALR);
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| 		stsr = readl(crtc->regs + CDNS_RTC_STSR);
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| 
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| 		if ((stsr & CDNS_RTC_STSR_VT_VC) == CDNS_RTC_STSR_VT_VC) {
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| 			ret = 0;
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| 			break;
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| 		}
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| 	}
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| 
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| 	cdns_rtc_set_enabled(crtc, true);
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| 	return ret;
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| }
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| 
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| static int cdns_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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| {
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| 	struct cdns_rtc *crtc = dev_get_drvdata(dev);
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| 
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| 	if (enabled) {
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| 		writel((CDNS_RTC_AEI_SEC | CDNS_RTC_AEI_MIN | CDNS_RTC_AEI_HOUR
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| 			| CDNS_RTC_AEI_DATE | CDNS_RTC_AEI_MNTH),
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| 		       crtc->regs + CDNS_RTC_AENR);
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| 		writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IENR);
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| 	} else {
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| 		writel(0, crtc->regs + CDNS_RTC_AENR);
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| 		writel(CDNS_RTC_AEI_ALRM, crtc->regs + CDNS_RTC_IDISR);
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| 	}
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| 
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| 	return 0;
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| }
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| 
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| static int cdns_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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| {
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| 	struct cdns_rtc *crtc = dev_get_drvdata(dev);
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| 	u32 reg;
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| 
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| 	reg = readl(crtc->regs + CDNS_RTC_TIMAR);
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| 	cdns_rtc_reg2time(reg, &alarm->time);
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| 
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| 	reg = readl(crtc->regs + CDNS_RTC_CALAR);
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| 	alarm->time.tm_mday = bcd2bin(FIELD_GET(CDNS_RTC_CAL_D, reg));
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| 	alarm->time.tm_mon  = bcd2bin(FIELD_GET(CDNS_RTC_CAL_M, reg)) - 1;
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| 
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| 	return 0;
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| }
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| 
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| static int cdns_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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| {
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| 	struct cdns_rtc *crtc = dev_get_drvdata(dev);
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| 	int ret = -EIO;
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| 	int tries;
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| 	u32 timar, calar, stsr;
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| 
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| 	cdns_rtc_alarm_irq_enable(dev, 0);
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| 
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| 	timar = cdns_rtc_time2reg(&alarm->time);
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| 	calar = FIELD_PREP(CDNS_RTC_CAL_D, bin2bcd(alarm->time.tm_mday))
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| 	      | FIELD_PREP(CDNS_RTC_CAL_M, bin2bcd(alarm->time.tm_mon + 1));
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| 
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| 	/* Update registers, check valid alarm flags */
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| 	for (tries = 0; tries < CDNS_RTC_MAX_REGS_TRIES; tries++) {
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| 		writel(timar, crtc->regs + CDNS_RTC_TIMAR);
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| 		writel(calar, crtc->regs + CDNS_RTC_CALAR);
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| 		stsr = readl(crtc->regs + CDNS_RTC_STSR);
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| 
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| 		if ((stsr & CDNS_RTC_STSR_VTA_VCA) == CDNS_RTC_STSR_VTA_VCA) {
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| 			ret = 0;
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| 			break;
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| 		}
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| 	}
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| 
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| 	if (!ret)
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| 		cdns_rtc_alarm_irq_enable(dev, alarm->enabled);
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| 	return ret;
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| }
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| 
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| static const struct rtc_class_ops cdns_rtc_ops = {
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| 	.read_time	= cdns_rtc_read_time,
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| 	.set_time	= cdns_rtc_set_time,
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| 	.read_alarm	= cdns_rtc_read_alarm,
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| 	.set_alarm	= cdns_rtc_set_alarm,
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| 	.alarm_irq_enable = cdns_rtc_alarm_irq_enable,
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| };
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| 
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| static int cdns_rtc_probe(struct platform_device *pdev)
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| {
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| 	struct cdns_rtc *crtc;
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| 	struct resource *res;
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| 	int ret;
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| 	unsigned long ref_clk_freq;
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| 
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| 	crtc = devm_kzalloc(&pdev->dev, sizeof(*crtc), GFP_KERNEL);
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| 	if (!crtc)
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| 		return -ENOMEM;
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| 
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| 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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| 	crtc->regs = devm_ioremap_resource(&pdev->dev, res);
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| 	if (IS_ERR(crtc->regs))
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| 		return PTR_ERR(crtc->regs);
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| 
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| 	crtc->irq = platform_get_irq(pdev, 0);
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| 	if (crtc->irq < 0)
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| 		return -EINVAL;
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| 
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| 	crtc->pclk = devm_clk_get(&pdev->dev, "pclk");
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| 	if (IS_ERR(crtc->pclk)) {
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| 		ret = PTR_ERR(crtc->pclk);
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| 		dev_err(&pdev->dev,
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| 			"Failed to retrieve the peripheral clock, %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	crtc->ref_clk = devm_clk_get(&pdev->dev, "ref_clk");
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| 	if (IS_ERR(crtc->ref_clk)) {
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| 		ret = PTR_ERR(crtc->ref_clk);
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| 		dev_err(&pdev->dev,
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| 			"Failed to retrieve the reference clock, %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	crtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
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| 	if (IS_ERR(crtc->rtc_dev)) {
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| 		ret = PTR_ERR(crtc->rtc_dev);
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| 		dev_err(&pdev->dev,
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| 			"Failed to allocate the RTC device, %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	platform_set_drvdata(pdev, crtc);
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| 
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| 	ret = clk_prepare_enable(crtc->pclk);
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| 	if (ret) {
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| 		dev_err(&pdev->dev,
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| 			"Failed to enable the peripheral clock, %d\n", ret);
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| 		return ret;
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| 	}
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| 
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| 	ret = clk_prepare_enable(crtc->ref_clk);
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| 	if (ret) {
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| 		dev_err(&pdev->dev,
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| 			"Failed to enable the reference clock, %d\n", ret);
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| 		goto err_disable_pclk;
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| 	}
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| 
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| 	ref_clk_freq = clk_get_rate(crtc->ref_clk);
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| 	if ((ref_clk_freq != 1) && (ref_clk_freq != 100)) {
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| 		dev_err(&pdev->dev,
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| 			"Invalid reference clock frequency %lu Hz.\n",
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| 			ref_clk_freq);
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| 		ret = -EINVAL;
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| 		goto err_disable_ref_clk;
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| 	}
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| 
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| 	ret = devm_request_irq(&pdev->dev, crtc->irq,
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| 			       cdns_rtc_irq_handler, 0,
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| 			       dev_name(&pdev->dev), &pdev->dev);
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| 	if (ret) {
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| 		dev_err(&pdev->dev,
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| 			"Failed to request interrupt for the device, %d\n",
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| 			ret);
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| 		goto err_disable_ref_clk;
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| 	}
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| 
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| 	/* The RTC supports 01.01.1900 - 31.12.2999 */
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| 	crtc->rtc_dev->range_min = mktime64(1900,  1,  1,  0,  0,  0);
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| 	crtc->rtc_dev->range_max = mktime64(2999, 12, 31, 23, 59, 59);
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| 
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| 	crtc->rtc_dev->ops = &cdns_rtc_ops;
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| 	device_init_wakeup(&pdev->dev, true);
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| 
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| 	/* Always use 24-hour mode and keep the RTC values */
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| 	writel(0, crtc->regs + CDNS_RTC_HMR);
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| 	writel(CDNS_RTC_KRTCR_KRTC, crtc->regs + CDNS_RTC_KRTCR);
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| 
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| 	ret = rtc_register_device(crtc->rtc_dev);
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| 	if (ret) {
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| 		dev_err(&pdev->dev,
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| 			"Failed to register the RTC device, %d\n", ret);
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| 		goto err_disable_wakeup;
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| 	}
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| 
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| 	return 0;
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| 
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| err_disable_wakeup:
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| 	device_init_wakeup(&pdev->dev, false);
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| 
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| err_disable_ref_clk:
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| 	clk_disable_unprepare(crtc->ref_clk);
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| 
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| err_disable_pclk:
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| 	clk_disable_unprepare(crtc->pclk);
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| 
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| 	return ret;
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| }
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| 
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| static int cdns_rtc_remove(struct platform_device *pdev)
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| {
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| 	struct cdns_rtc *crtc = platform_get_drvdata(pdev);
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| 
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| 	cdns_rtc_alarm_irq_enable(&pdev->dev, 0);
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| 	device_init_wakeup(&pdev->dev, 0);
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| 
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| 	clk_disable_unprepare(crtc->pclk);
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| 	clk_disable_unprepare(crtc->ref_clk);
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| 
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| 	return 0;
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| }
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| 
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| #ifdef CONFIG_PM_SLEEP
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| static int cdns_rtc_suspend(struct device *dev)
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| {
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| 	struct cdns_rtc *crtc = dev_get_drvdata(dev);
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| 
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| 	if (device_may_wakeup(dev))
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| 		enable_irq_wake(crtc->irq);
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| 
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| 	return 0;
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| }
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| 
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| static int cdns_rtc_resume(struct device *dev)
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| {
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| 	struct cdns_rtc *crtc = dev_get_drvdata(dev);
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| 
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| 	if (device_may_wakeup(dev))
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| 		disable_irq_wake(crtc->irq);
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| 
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| 	return 0;
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| }
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| #endif
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| 
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| static SIMPLE_DEV_PM_OPS(cdns_rtc_pm_ops, cdns_rtc_suspend, cdns_rtc_resume);
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| 
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| static const struct of_device_id cdns_rtc_of_match[] = {
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| 	{ .compatible = "cdns,rtc-r109v3" },
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| 	{ },
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| };
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| MODULE_DEVICE_TABLE(of, cdns_rtc_of_match);
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| 
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| static struct platform_driver cdns_rtc_driver = {
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| 	.driver = {
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| 		.name = "cdns-rtc",
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| 		.of_match_table = cdns_rtc_of_match,
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| 		.pm = &cdns_rtc_pm_ops,
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| 	},
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| 	.probe = cdns_rtc_probe,
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| 	.remove = cdns_rtc_remove,
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| };
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| module_platform_driver(cdns_rtc_driver);
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| 
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| MODULE_AUTHOR("Jan Kotas <jank@cadence.com>");
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| MODULE_DESCRIPTION("Cadence RTC driver");
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| MODULE_LICENSE("GPL v2");
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| MODULE_ALIAS("platform:cdns-rtc");
 |