forked from mirrors/linux
0c634bafe3
Some functions assume IOMMU page size can only be 4K (pageshift == 12). Update them to accept any page size passed, so we can use 64K pages. In the process, some defines like TCE_SHIFT were made obsolete, and then removed. IODA3 Revision 3.0_prd1 (OpenPowerFoundation), Figures 3.4 and 3.5 show a RPN of 52-bit, and considers a 12-bit pageshift, so there should be no need of using TCE_RPN_MASK, which masks out any bit after 40 in rpn. It's usage removed from tce_build_pSeries(), tce_build_pSeriesLP(), and tce_buildmulti_pSeriesLP(). Most places had a tbl struct, so using tbl->it_page_shift was simple. tce_free_pSeriesLP() was a special case, since callers not always have a tbl struct, so adding a tceshift parameter seems the right thing to do. Signed-off-by: Leonardo Bras <leobras.c@gmail.com> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210817063929.38701-2-leobras.c@gmail.com
30 lines
892 B
C
30 lines
892 B
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
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* Rewrite, cleanup:
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* Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
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*/
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#ifndef _ASM_POWERPC_TCE_H
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#define _ASM_POWERPC_TCE_H
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#ifdef __KERNEL__
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#include <asm/iommu.h>
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/*
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* Tces come in two formats, one for the virtual bus and a different
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* format for PCI. PCI TCEs can have hardware or software maintianed
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* coherency.
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*/
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#define TCE_VB 0
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#define TCE_PCI 1
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#define TCE_ENTRY_SIZE 8 /* each TCE is 64 bits */
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#define TCE_VALID 0x800 /* TCE valid */
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#define TCE_ALLIO 0x400 /* TCE valid for all lpars */
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#define TCE_PCI_WRITE 0x2 /* write from PCI allowed */
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#define TCE_PCI_READ 0x1 /* read from PCI allowed */
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#define TCE_VB_WRITE 0x1 /* write from VB allowed */
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_TCE_H */
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