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[Why] There is a known HW bug that causes the internal 3DLUT fetch signal to be lost at VREADY, regardless of whether the OTG lock is being held or not. A workaround is necessary to make sure that this internal signal stays up after OTG unlock. [How] Set the 3DLUT_ENABLE bit immediately before and after the unlock. Also use VUPDATE_KEEPOUT to prevent lock transition in the region between VSTARTUP and VREADY, which could cause issues with this WA sequence. Also including misc. 3DLUT DMA-related sequence fixes to address a few regressions causing corruption. Reviewed-by: Dillon Varone <dillon.varone@amd.com> Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| abm.h | ||
| audio.h | ||
| aux_engine.h | ||
| clk_mgr.h | ||
| clk_mgr_internal.h | ||
| cursor_reg_cache.h | ||
| dccg.h | ||
| dchubbub.h | ||
| dmcu.h | ||
| dpp.h | ||
| dwb.h | ||
| gpio.h | ||
| hubp.h | ||
| hw_shared.h | ||
| ipp.h | ||
| link_encoder.h | ||
| mcif_wb.h | ||
| mem_input.h | ||
| mpc.h | ||
| opp.h | ||
| optc.h | ||
| panel_cntl.h | ||
| pg_cntl.h | ||
| stream_encoder.h | ||
| timing_generator.h | ||
| transform.h | ||
| vmid.h | ||
| vpg.h | ||